just boots

This commit is contained in:
haru 2022-06-29 16:11:13 +09:00
parent b1a50ffe82
commit f3080542ae
10 changed files with 272 additions and 0 deletions

View File

@ -706,6 +706,8 @@ source "arch/arm/mach-vt8500/Kconfig"
source "arch/arm/mach-zynq/Kconfig"
source "arch/arm/mach-celestial/Kconfig"
# ARMv7-M architecture
config ARCH_LPC18XX
bool "NXP LPC18xx/LPC43xx"

View File

@ -119,6 +119,14 @@ choice
prompt "Kernel low-level debugging port"
depends on DEBUG_LL
config DEBUG_CELESTIAL_UART
bool "Kernel low-level debugging on CNC1800L"
depends on MACH_CELESTIAL
select DEBUG_UART_8250
help
Say Y here if you want kernel low-level debugging support
on Celestial platforms.
config DEBUG_ALPINE_UART0
bool "Kernel low-level debugging messages via Alpine UART0"
depends on ARCH_ALPINE
@ -1593,6 +1601,7 @@ config DEBUG_UART_8250
config DEBUG_UART_PHYS
hex "Physical base address of debug UART"
default 0x801f1000 if DEBUG_CELESTIAL_UART
default 0x01c20000 if DEBUG_DAVINCI_DMx_UART0
default 0x01c28000 if DEBUG_SUNXI_UART0
default 0x01c28400 if DEBUG_SUNXI_UART1
@ -1734,6 +1743,7 @@ config DEBUG_UART_PHYS
config DEBUG_UART_VIRT
hex "Virtual base address of debug UART"
default 0xfec00000 if DEBUG_CELESTIAL_UART
default 0xc881f000 if DEBUG_RV1108_UART2
default 0xc8821000 if DEBUG_RV1108_UART1
default 0xc8912000 if DEBUG_RV1108_UART0

View File

@ -220,6 +220,7 @@ machine-$(CONFIG_ARCH_VEXPRESS) += vexpress
machine-$(CONFIG_ARCH_VT8500) += vt8500
machine-$(CONFIG_ARCH_ZYNQ) += zynq
machine-$(CONFIG_PLAT_SPEAR) += spear
machine-$(CONFIG_MACH_CELESTIAL) += celestial
# Platform directory name. This list is sorted alphanumerically
# by CONFIG_* macro name.

View File

@ -1499,3 +1499,4 @@ dtb-$(CONFIG_ARCH_ASPEED) += \
aspeed-bmc-portwell-neptune.dtb \
aspeed-bmc-quanta-q71l.dtb \
aspeed-bmc-supermicro-x11spi.dtb
dtb-$(CONFIG_MACH_CELESTIAL) += celestial-cnc1800l.dtb

View File

@ -0,0 +1,78 @@
/dts-v1/;
/ {
#address-cells = <1>;
#size-cells = <1>;
interrupt-parent = <&vic>;
model = "Cavium Celestial CNC1800L";
compatible = "cavium,cnc1800l";
chosen {
stdout-path = "/uart@801f1000:115200";
};
memory {
device_type = "memory";
reg = <0x00000000 0x088fffff>;
};
cpus {
#address-cells = <0>;
#size-cells = <0>;
cpu {
compatible = "arm,arm1176jzf";
device_type = "cpu";
// clocks = <&timer0>;
};
};
clocks{
timclk: timclk{
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <94500000>;
};
pclk: pclk{
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <47250000>;
};
};
vic: interrupt-controller@10130000 {
compatible = "snps,dw-apb-ictl";
reg = <0x80140000 0x1000>;
interrupt-controller;
#interrupt-cells = <1>;
};
timer0: timer@801e2000 {
compatible = "snps,dw-apb-timer";
interrupts = <10>;
reg = <0x801e2000 0x100>;
clocks = <&timclk>, <&pclk>;
clock-names = "timer", "pclk";
// clock-frequency = <94500000>;
// #clock-cells = <1>;
};
watchdog0: wd@801e1000 {
compatible = "snps,dw-wdt";
reg = <0x801e1000 0x100>;
interrupts = <0>;
clocks = <&pclk>;
// resets = <&rst WDT0_RESET>;
};
uart0: uart@801f1000 {
compatible = "ns8250";
reg = <0x801f1000 0x100>;
clock-frequency = <47250000>;
interrupts = <12>;
reg-shift = <2>;
};
};

View File

@ -0,0 +1,10 @@
config MACH_CELESTIAL
bool "Celestial CNC1800L"
depends on ARCH_MULTI_V6
select DW_APB_ICTL
select DW_APB_TIMER
select DW_APB_TIMER_OF
select SERIAL_8250
select SERIAL_8250_CONSOLE
help
Support for Cavium CNC1800L Soc.

View File

@ -0,0 +1 @@
obj-$(CONFIG_MACH_CELESTIAL) := cnc1800l_machine.o

View File

@ -0,0 +1,91 @@
/*
* linux/arch/arm/mach-celestialsemi/include/mach/irqs.h
*
* Copyright (C) 2010 Celestial
* Author: Xiaodong Fan <xiaodong.fan@celestialsemi.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#ifndef __ASM_ARM_ARCH_IRQ_H
#define __ASM_ARM_ARCH_IRQ_H
/*
* IRQ interrupts definitions are the same the INT definitions
* held within platform.h
*/
#ifdef(CONFIG_ARCH_CELESTIAL)
#define IRQ_WDOGINT 0
#define IRQ_PCMCIA 1
#define IRQ_I2C1_COMMRRx 2
#define IRQ_I2C2_COMMRTx 3
#define IRQ_TIMER1 4 /* AHB timer 1*/
#define IRQ_TIMER2 5 /* AHB timer 2 */
#define IRQ_GPIO 6
#define IRQ_DF1 7
#define IRQ_PANEL_CTL 8
#define IRQ_IR 9
#define IRQ_APB_TIMER 10
#define IRQ_SPI 11
#define IRQ_UART0 12
#define IRQ_UART1 13
#define IRQ_SMART_CART 14
#define IRQ_SECURITY 15
#define IRQ_TRANSPORT_1 16
#define IRQ_TRANSPORT_2 17
#define IRQ_SDIO 18
#define IRQ_MSHCI 18
#define IRQ_GFX_BLIT 19
#define IRQ_VIDEO_PROCESSOR 20
#define IRQ_AUDIO_PROCESSOR 21
#define IRQ_USB_EHCI 22
#define IRQ_ETH_DMA 24
#define IRQ_DF2 25
#define IRQ_CRYPTO_ENG 26
#define IRQ_USB_OHCI 27
#define IRQ_PCMCIA_IO 28
#define IRQ_PCMCIA_REQUEST 29
#define IRQ_HDMI 30
#define IRQ_EXTERNAL 31
#define NR_IRQS_VIC 32
#define MAX_GPIO_NUMBER 41
#define NR_IRQS (NR_IRQS_VIC + MAX_GPIO_NUMBER)
#define VIC_IRQ_ENABLE 0
#define VIC_IRQ_MASK 0x8
#define VIC_IRQ_INTFORCE 0x10
#define VIC_IRQ_RAW_STATUS 0x18
#define VIC_IRQ_STATUS 0x20
#define VIC_IRQ_MASK_STATUS 0x28
#define VIC_IRQ_FINAL_STATUS 0x30
#endif /* for cnc1800l defines */
// #define gpio_to_irq(gpio) \
// (((gpio) <= MAX_GPIO_NUMBER) ? (NR_IRQS_VIC + (gpio)) : -EINVAL)
// #define irq_to_gpio(irq) ((irq) - gpio_to_irq(0))
#endif

View File

@ -0,0 +1,50 @@
#include <linux/clocksource.h>
#include <linux/dma-mapping.h>
#include <linux/io.h>
#include <linux/irqchip.h>
#include <linux/irqchip/arm-gic.h>
#include <linux/of.h>
#include <linux/of_address.h>
#include <linux/clk-provider.h>
#include <linux/regmap.h>
#include <linux/smp.h>
#include <asm/smp_scu.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <asm/psci.h>
#include <linux/arm-smccc.h>
#define CNC1800L_VIRT_UART0 0xfec00000
static struct map_desc cnc1800l_of_io_desc[] __initdata = {
#ifdef CONFIG_DEBUG_UART_8250
{
.virtual = CNC1800L_VIRT_UART0,
.pfn = __phys_to_pfn(CNC1800L_VIRT_UART0),
.length = SZ_4K,
.type = MT_DEVICE,
},
#endif
};
static void __init cnc1800l_of_map_io(void)
{
iotable_init(cnc1800l_of_io_desc, ARRAY_SIZE(cnc1800l_of_io_desc));
}
static void __init cnc1800l_init_machine(void)
{
return;
}
static const char * const cnc1800l_dt_match[] = {
"cavium,cnc1800l",
NULL
};
DT_MACHINE_START(CNC1800L, "Cavium Celestial CNC1800L")
.map_io = cnc1800l_of_map_io,
.init_machine = cnc1800l_init_machine,
.dt_compat = cnc1800l_dt_match,
MACHINE_END

View File

@ -0,0 +1,28 @@
/*
* arch/arm/mach-celestialsemi/include/mach/cnc1800l.h
*
* This file contains the hardware definitions of the cavium Celestial Platform.
*
* Copyright (C) 2010 Celestial Semiconductor
* Copyright (C) 2011 Cavium
* Author: Xaodong Fan <xiaodong.fan@caviumnetworks.com>
*/
#ifndef __ASM_ARCH_CNC1800L_H
#define __ASM_ARCH_CNC1800L_H
#define PCLK_FREQ 47250000
#define TIMER_CLK 94500000
#define CS_PHY_RAM_BASE 0x00000000
#define PA_IO_REGS_BASE 0x80100000
#define IO_REGS_SIZE 0x500000
#define PA_DMAC_BASE (PA_IO_REGS_BASE + 0x130000) // 0xB0230000
#define PA_UART0_BASE (PA_IO_REGS_BASE + 0xf1000)
#define PA_UART1_BASE (PA_IO_REGS_BASE + 0xf2000)
#define PA_TIMER0_BASE (PA_IO_REGS_BASE + 0x170000)
#define PA_TIMER1_BASE (PA_IO_REGS_BASE + 0x180000)
#define PA_APB_TIMER_BASE (PA_IO_REGS_BASE + 0xe2000)
#define PA_VIC_BASE (PA_IO_REGS_BASE + 0x40000)
#endif