From 3667690d43c273bb51f8262fde5228200699309d Mon Sep 17 00:00:00 2001 From: haru Date: Mon, 18 Jul 2022 22:50:44 +0900 Subject: [PATCH] update mtd structure --- drivers/mtd/nand/raw/cnc1800l-nand.c | 72 ++++++++++++++++++++++++++++ 1 file changed, 72 insertions(+) diff --git a/drivers/mtd/nand/raw/cnc1800l-nand.c b/drivers/mtd/nand/raw/cnc1800l-nand.c index 060fbef47..86ea2e76a 100644 --- a/drivers/mtd/nand/raw/cnc1800l-nand.c +++ b/drivers/mtd/nand/raw/cnc1800l-nand.c @@ -65,6 +65,8 @@ #define PADDR 0x80100000 +// original partition structure. +#if 0 static struct mtd_partition cnc_nand_partitions[] = { { .name = "cavm_miniloader", @@ -172,6 +174,76 @@ static struct mtd_partition cnc_nand_partitions[] = { .mask_flags = 0, } }; +#endif + +static struct mtd_partition cnc_nand_partitions[] = { + { + .name = "cavm_miniloader", + .offset = 0, + .size = SZ_128K, + .mask_flags = MTD_WRITEABLE,/*Read only*/ + }, { + .name = "cavm_uboot1", + .offset = MTDPART_OFS_APPEND, + .size = SZ_512K, + .mask_flags = MTD_WRITEABLE,/*Read only*/ + }, { + .name = "cavm_uboot1_pad", + .offset = MTDPART_OFS_APPEND, + .size = SZ_512K, + .mask_flags = 0, + }, { + .name = "cavm_nvram_factory", + .offset = MTDPART_OFS_APPEND, + .size = SZ_128K, + .mask_flags = MTD_WRITEABLE,/*Read only*/ + }, { + .name = "cavm_nvram_factory_pad", + .offset = MTDPART_OFS_APPEND, + .size = SZ_128K, + .mask_flags = MTD_WRITEABLE,/*Read only*/ + }, { + .name = "cavm_nvram1b", + .offset = MTDPART_OFS_APPEND, + .size = SZ_128K, + .mask_flags = MTD_WRITEABLE,/*Read only*/ + }, { + .name = "cavm_nvram2", + .offset = MTDPART_OFS_APPEND, + .size = SZ_128K, + .mask_flags = 0, + }, { + .name = "cavm_nvram2b", + .offset = MTDPART_OFS_APPEND, + .size = SZ_128K, + .mask_flags = 0, + }, { + .name = "cavm_splash", + .offset = MTDPART_OFS_APPEND, + .size = SZ_2M, + .mask_flags = 0, + }, { + .name = "cavm_all_img1_info", + .offset = MTDPART_OFS_APPEND, + .size = SZ_128K, + .mask_flags = MTD_WRITEABLE,/*Read only*/ + }, { + .name = "cavm_all_img1_info_pad", + .offset = MTDPART_OFS_APPEND, + .size = SZ_128K, + .mask_flags = MTD_WRITEABLE,/*Read only*/ + }, { + .name = "kernel", + .offset = MTDPART_OFS_APPEND, + .size = SZ_8M, + .mask_flags = 0, + }, { + .name = "rootfs", + .offset = MTDPART_OFS_APPEND, + .size = MTDPART_SIZ_FULL, + .mask_flags = 0, + } +}; struct cnc_nand_info { struct nand_chip *chip;