Thorsten Blum ee46245564 clk: socfpga: arria10: Optimize local variables in clk_pll_recalc_rate() ...

Since readl() returns a u32, the local variable reg can also have the
data type u32. Furthermore, divf and divq are derived from reg and can
also be a u32.

Since do_div() casts the divisor to u32 anyway, changing the data type
of divq to u32 also removes the following Coccinelle/coccicheck warning
reported by do_div.cocci:

  WARNING: do_div() does a 64-by-32 division, please consider using div64_ul instead

Compile-tested only.

Signed-off-by: Thorsten Blum <thorsten.blum@linux.dev>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>

2024-12-16 18:22:00 -06:00

..

clk-agilex.c

clk: socfpga: agilex: Add bounds-checking coverage for struct stratix10_clock_data

2023-10-23 20:34:39 -07:00

clk-gate-a10.c

clk: socfpga: arria10: use of_clk_add_hw_provider and improve error handling

2023-03-21 16:47:48 -07:00

clk-gate-s10.c

clk: cleanup comments

2022-03-11 18:22:15 -08:00

clk-gate.c

clk: socfpga: gate: Account for the divider in determine_rate

2023-10-12 17:30:54 -07:00

clk-periph-a10.c

clk: socfpga: arria10: use of_clk_add_hw_provider and improve error handling

2023-03-21 16:47:48 -07:00

clk-periph-s10.c

clk: socfpga: cleanup spdx tags

2022-03-11 18:21:45 -08:00

clk-periph.c

clk: socfpga: use of_clk_add_hw_provider and improve error handling

2023-03-21 16:47:48 -07:00

clk-pll-a10.c

clk: socfpga: arria10: Optimize local variables in clk_pll_recalc_rate()

2024-12-16 18:22:00 -06:00

clk-pll-s10.c

clk: socfpga: cleanup spdx tags

2022-03-11 18:21:45 -08:00

clk-pll.c

clk: socfpga: use of_clk_add_hw_provider and improve error handling

2023-03-21 16:47:48 -07:00

clk-s10.c

clk: socfpga: agilex: Add bounds-checking coverage for struct stratix10_clock_data

2023-10-23 20:34:39 -07:00

clk.c

treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 13

2019-05-21 11:28:45 +02:00

clk.h

clk: socfpga: remove the setting of clk-phase for sdmmc_clk

2022-12-07 13:22:37 +01:00

Kconfig

clk: socfpga: use ARCH_INTEL_SOCFPGA also for 32-bit ARM SoCs (and compile test)

2021-03-23 11:03:36 -05:00

Makefile

clk: socfpga: use ARCH_INTEL_SOCFPGA also for 32-bit ARM SoCs (and compile test)

2021-03-23 11:03:36 -05:00

stratix10-clk.h

clk: socfpga: Fix undefined behavior bug in struct stratix10_clock_data

2023-10-23 20:34:39 -07:00