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A set of updates for the interrupt subsystem:

Browse Source 
1) A treewide cleanup for the irq_domain code, which makes the naming
      consistent and gets rid of the original oddity of naming domains
      'host'.
 
      This is a trivial mechanical change and is done late to ensure that
      all instances have been catched and new code merged post rc1 wont
      reintroduce new instances.
 
   2) A trivial consistency fix in the migration code
 
      The recent introduction of irq_force_complete_move() in the core
      code, causes a problem for the nostalgia crowd who maintains ia64 out
      of tree.
 
      The code assumes that hierarchical interrupt domains are enabled and
      dereferences irq_data::parent_data unconditionally. That works in mainline
      because both architectures which enable that code have hierarchical domains
      enabled. Though it breaks the ia64 build, which enables the functionality,
      but does not have hierarchical domains.
 
      While it's not really a problem for mainline today, this
      unconditional dereference is inconsistent and trivially fixable by
      using the existing helper function irqd_get_parent_data(), which has
      the appropriate #ifdeffery in place.
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Merge tag 'irq-urgent-2025-04-06' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip

Pull more irq updates from Thomas Gleixner:
 "A set of updates for the interrupt subsystem:

   - A treewide cleanup for the irq_domain code, which makes the naming
     consistent and gets rid of the original oddity of naming domains
     'host'.

     This is a trivial mechanical change and is done late to ensure that
     all instances have been catched and new code merged post rc1 wont
     reintroduce new instances.

   - A trivial consistency fix in the migration code

     The recent introduction of irq_force_complete_move() in the core
     code, causes a problem for the nostalgia crowd who maintains ia64
     out of tree.

     The code assumes that hierarchical interrupt domains are enabled
     and dereferences irq_data::parent_data unconditionally. That works
     in mainline because both architectures which enable that code have
     hierarchical domains enabled. Though it breaks the ia64 build,
     which enables the functionality, but does not have hierarchical
     domains.

     While it's not really a problem for mainline today, this
     unconditional dereference is inconsistent and trivially fixable by
     using the existing helper function irqd_get_parent_data(), which
     has the appropriate #ifdeffery in place"

* tag 'irq-urgent-2025-04-06' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  genirq/migration: Use irqd_get_parent_data() in irq_force_complete_move()
  irqdomain: Stop using 'host' for domain
  irqdomain: Rename irq_get_default_host() to irq_get_default_domain()
  irqdomain: Rename irq_set_default_host() to irq_set_default_domain()
This commit is contained in:
Linus Torvalds 2025-04-06 08:17:43 -07:00
commit ff0c66685d
36 changed files with 54 additions and 54 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
arch/arc/kernel/intc-arcv2.c
View File

@ -178,7 +178,7 @@ init_onchip_IRQ(struct device_node *intc, struct device_node *parent)
* Needed for primary domain lookup to succeed
* This is a primary irqchip, and can never have a parent
*/
irq_set_default_host(root_domain);
irq_set_default_domain(root_domain);
#ifdef CONFIG_SMP
irq_create_mapping(root_domain, IPI_IRQ);

2
arch/arc/kernel/intc-compact.c
View File

@ -121,7 +121,7 @@ init_onchip_IRQ(struct device_node *intc, struct device_node *parent)
* Needed for primary domain lookup to succeed
* This is a primary irqchip, and can never have a parent
*/
irq_set_default_host(root_domain);
irq_set_default_domain(root_domain);
return 0;
}

2
arch/arm/mach-pxa/irq.c
View File

@ -152,7 +152,7 @@ pxa_init_irq_common(struct device_node *node, int irq_nr,
&pxa_irq_ops, NULL);
if (!pxa_irq_domain)
panic("Unable to add PXA IRQ domain\n");
irq_set_default_host(pxa_irq_domain);
irq_set_default_domain(pxa_irq_domain);
for (n = 0; n < irq_nr; n += 32) {
void __iomem *base = irq_base(n >> 5);

6
arch/mips/cavium-octeon/octeon-irq.c
View File

@ -1505,7 +1505,7 @@ static int __init octeon_irq_init_ciu(
ciu_domain = irq_domain_add_tree(
ciu_node, &octeon_irq_domain_ciu_ops, dd);
irq_set_default_host(ciu_domain);
irq_set_default_domain(ciu_domain);
/* CIU_0 */
for (i = 0; i < 16; i++) {
@ -2076,7 +2076,7 @@ static int __init octeon_irq_init_ciu2(
ciu_domain = irq_domain_add_tree(
ciu_node, &octeon_irq_domain_ciu2_ops, NULL);
irq_set_default_host(ciu_domain);
irq_set_default_domain(ciu_domain);
/* CUI2 */
for (i = 0; i < 64; i++) {
@ -2929,7 +2929,7 @@ static int __init octeon_irq_init_ciu3(struct device_node *ciu_node,
/* Only do per CPU things if it is the CIU of the boot node. */
octeon_irq_ciu3_alloc_resources(ciu3_info);
if (node == 0)
irq_set_default_host(domain);
irq_set_default_domain(domain);
octeon_irq_use_ip4 = false;
/* Enable the CIU lines */

2
arch/mips/pci/pci-xtalk-bridge.c
View File

@ -620,7 +620,7 @@ static int bridge_probe(struct platform_device *pdev)
if (bridge_get_partnum(virt_to_phys((void *)bd->bridge_addr), partnum))
return -EPROBE_DEFER; /* not available yet */
parent = irq_get_default_host();
parent = irq_get_default_domain();
if (!parent)
return -ENODEV;
fn = irq_domain_alloc_named_fwnode("BRIDGE");

2
arch/mips/sgi-ip27/ip27-irq.c
View File

@ -297,7 +297,7 @@ void __init arch_init_irq(void)
if (WARN_ON(domain == NULL))
return;
irq_set_default_host(domain);
irq_set_default_domain(domain);
irq_set_percpu_devid(IP27_HUB_PEND0_IRQ);
irq_set_chained_handler_and_data(IP27_HUB_PEND0_IRQ, ip27_do_irq_mask0,

2
arch/mips/sgi-ip30/ip30-irq.c
View File

@ -313,7 +313,7 @@ void __init arch_init_irq(void)
if (!domain)
return;
irq_set_default_host(domain);
irq_set_default_domain(domain);
irq_set_percpu_devid(IP30_HEART_L0_IRQ);
irq_set_chained_handler_and_data(IP30_HEART_L0_IRQ, ip30_normal_irq,

2
arch/nios2/kernel/irq.c
View File

@ -72,7 +72,7 @@ void __init init_IRQ(void)
domain = irq_domain_add_linear(node, NIOS2_CPU_NR_IRQS, &irq_ops, NULL);
BUG_ON(!domain);
irq_set_default_host(domain);
irq_set_default_domain(domain);
of_node_put(node);
/* Load the initial ienable value */
ienable = RDCTL(CTL_IENABLE);

2
arch/powerpc/kvm/book3s_hv.c
View File

@ -6041,7 +6041,7 @@ static int kvmppc_set_passthru_irq(struct kvm *kvm, int host_irq, int guest_gsi)
* the underlying calls, which will EOI the interrupt in real
* mode, need an HW IRQ number mapped in the XICS IRQ domain.
*/
host_data = irq_domain_get_irq_data(irq_get_default_host(), host_irq);
host_data = irq_domain_get_irq_data(irq_get_default_domain(), host_irq);
irq_map->r_hwirq = (unsigned int)irqd_to_hwirq(host_data);
if (i == pimap->n_mapped)

2
arch/powerpc/kvm/book3s_xive.c
View File

@ -1555,7 +1555,7 @@ int kvmppc_xive_set_mapped(struct kvm *kvm, unsigned long guest_irq,
struct kvmppc_xive_src_block *sb;
struct kvmppc_xive_irq_state *state;
struct irq_data *host_data =
irq_domain_get_irq_data(irq_get_default_host(), host_irq);
irq_domain_get_irq_data(irq_get_default_domain(), host_irq);
unsigned int hw_irq = (unsigned int)irqd_to_hwirq(host_data);
u16 idx;
u8 prio;

2
arch/powerpc/platforms/44x/uic.c
View File

@ -291,7 +291,7 @@ void __init uic_init_tree(void)
if (!primary_uic)
panic("Unable to initialize primary UIC %pOF\n", np);
irq_set_default_host(primary_uic->irqhost);
irq_set_default_domain(primary_uic->irqhost);
of_node_put(np);
/* The scan again for cascaded UICs */

2
arch/powerpc/platforms/52xx/mpc52xx_pic.c
View File

@ -453,7 +453,7 @@ void __init mpc52xx_init_irq(void)
if (!mpc52xx_irqhost)
panic(__FILE__ ": Cannot allocate the IRQ host\n");
irq_set_default_host(mpc52xx_irqhost);
irq_set_default_domain(mpc52xx_irqhost);
pr_info("MPC52xx PIC is up and running!\n");
}

2
arch/powerpc/platforms/amigaone/setup.c
View File

@ -109,7 +109,7 @@ static void __init amigaone_init_IRQ(void)
i8259_init(pic, int_ack);
ppc_md.get_irq = i8259_irq;
irq_set_default_host(i8259_get_host());
irq_set_default_domain(i8259_get_host());
}
static int __init request_isa_regions(void)

2
arch/powerpc/platforms/chrp/setup.c
View File

@ -486,7 +486,7 @@ static void __init chrp_find_8259(void)
i8259_init(pic, chrp_int_ack);
if (ppc_md.get_irq == NULL) {
ppc_md.get_irq = i8259_irq;
irq_set_default_host(i8259_get_host());
irq_set_default_domain(i8259_get_host());
}
if (chrp_mpic != NULL) {
cascade_irq = irq_of_parse_and_map(pic, 0);

2
arch/powerpc/platforms/embedded6xx/flipper-pic.c
View File

@ -190,7 +190,7 @@ void __init flipper_pic_probe(void)
flipper_irq_host = flipper_pic_init(np);
BUG_ON(!flipper_irq_host);
irq_set_default_host(flipper_irq_host);
irq_set_default_domain(flipper_irq_host);
of_node_put(np);
}

2
arch/powerpc/platforms/pasemi/setup.c
View File

@ -228,7 +228,7 @@ static void __init nemo_init_IRQ(struct mpic *mpic)
irq_set_chained_handler(gpio_virq, sb600_8259_cascade);
mpic_unmask_irq(irq_get_irq_data(gpio_virq));
irq_set_default_host(mpic->irqhost);
irq_set_default_domain(mpic->irqhost);
}
#else

2
arch/powerpc/platforms/powermac/pic.c
View File

@ -330,7 +330,7 @@ static void __init pmac_pic_probe_oldstyle(void)
pmac_pic_host = irq_domain_add_linear(master, max_irqs,
&pmac_pic_host_ops, NULL);
BUG_ON(pmac_pic_host == NULL);
irq_set_default_host(pmac_pic_host);
irq_set_default_domain(pmac_pic_host);
/* Get addresses of first controller if we have a node for it */
BUG_ON(of_address_to_resource(master, 0, &r));

2
arch/powerpc/platforms/powernv/pci-ioda.c
View File

@ -1881,7 +1881,7 @@ static const struct irq_domain_ops pnv_irq_domain_ops = {
static int __init pnv_msi_allocate_domains(struct pci_controller *hose, unsigned int count)
{
struct pnv_phb *phb = hose->private_data;
struct irq_domain *parent = irq_get_default_host();
struct irq_domain *parent = irq_get_default_domain();
hose->fwnode = irq_domain_alloc_named_id_fwnode("PNV-MSI", phb->opal_id);
if (!hose->fwnode)

2
arch/powerpc/platforms/ps3/interrupt.c
View File

@ -744,7 +744,7 @@ void __init ps3_init_IRQ(void)
struct irq_domain *host;
host = irq_domain_add_nomap(NULL, PS3_PLUG_MAX + 1, &ps3_host_ops, NULL);
irq_set_default_host(host);
irq_set_default_domain(host);
for_each_possible_cpu(cpu) {
struct ps3_private *pd = &per_cpu(ps3_private, cpu);

2
arch/powerpc/platforms/pseries/msi.c
View File

@ -611,7 +611,7 @@ static const struct irq_domain_ops pseries_irq_domain_ops = {
static int __pseries_msi_allocate_domains(struct pci_controller *phb,
unsigned int count)
{
struct irq_domain *parent = irq_get_default_host();
struct irq_domain *parent = irq_get_default_domain();
phb->fwnode = irq_domain_alloc_named_id_fwnode("pSeries-MSI",
phb->global_number);

2
arch/powerpc/sysdev/ehv_pic.c
View File

@ -291,5 +291,5 @@ void __init ehv_pic_init(void)
ehv_pic->coreint_flag = of_property_read_bool(np, "has-external-proxy");
global_ehv_pic = ehv_pic;
irq_set_default_host(global_ehv_pic->irqhost);
irq_set_default_domain(global_ehv_pic->irqhost);
}

2
arch/powerpc/sysdev/ipic.c
View File

@ -757,7 +757,7 @@ struct ipic * __init ipic_init(struct device_node *node, unsigned int flags)
ipic_write(ipic->regs, IPIC_SEMSR, temp);
primary_ipic = ipic;
irq_set_default_host(primary_ipic->irqhost);
irq_set_default_domain(primary_ipic->irqhost);
ipic_write(ipic->regs, IPIC_SIMSR_H, 0);
ipic_write(ipic->regs, IPIC_SIMSR_L, 0);

2
arch/powerpc/sysdev/mpic.c
View File

@ -1520,7 +1520,7 @@ struct mpic * __init mpic_alloc(struct device_node *node,
if (!(mpic->flags & MPIC_SECONDARY)) {
mpic_primary = mpic;
irq_set_default_host(mpic->irqhost);
irq_set_default_domain(mpic->irqhost);
}
return mpic;

2
arch/powerpc/sysdev/xics/xics-common.c
View File

@ -472,7 +472,7 @@ static int __init xics_allocate_domain(void)
return -ENOMEM;
}
irq_set_default_host(xics_host);
irq_set_default_domain(xics_host);
return 0;
}

2
arch/powerpc/sysdev/xive/common.c
View File

@ -1467,7 +1467,7 @@ static void __init xive_init_host(struct device_node *np)
xive_irq_domain = irq_domain_add_tree(np, &xive_irq_domain_ops, NULL);
if (WARN_ON(xive_irq_domain == NULL))
return;
irq_set_default_host(xive_irq_domain);
irq_set_default_domain(xive_irq_domain);
}
static void xive_cleanup_cpu_queues(unsigned int cpu, struct xive_cpu *xc)

2
arch/x86/kernel/apic/vector.c
View File

@ -799,7 +799,7 @@ int __init arch_early_irq_init(void)
x86_vector_domain = irq_domain_create_tree(fn, &x86_vector_domain_ops,
NULL);
BUG_ON(x86_vector_domain == NULL);
irq_set_default_host(x86_vector_domain);
irq_set_default_domain(x86_vector_domain);
BUG_ON(!alloc_cpumask_var(&vector_searchmask, GFP_KERNEL));

6
drivers/irqchip/irq-armada-370-xp.c
View File

@ -564,7 +564,7 @@ static void mpic_reenable_percpu(struct mpic *mpic)
static int mpic_starting_cpu(unsigned int cpu)
{
struct mpic *mpic = irq_get_default_host()->host_data;
struct mpic *mpic = irq_get_default_domain()->host_data;
mpic_perf_init(mpic);
mpic_smp_cpu_init(mpic);
@ -700,7 +700,7 @@ static void mpic_handle_cascade_irq(struct irq_desc *desc)
static void __exception_irq_entry mpic_handle_irq(struct pt_regs *regs)
{
struct mpic *mpic = irq_get_default_host()->host_data;
struct mpic *mpic = irq_get_default_domain()->host_data;
irq_hw_number_t i;
u32 irqstat;
@ -880,7 +880,7 @@ static int __init mpic_of_init(struct device_node *node, struct device_node *par
}
if (mpic_is_ipi_available(mpic)) {
irq_set_default_host(mpic->domain);
irq_set_default_domain(mpic->domain);
set_handle_irq(mpic_handle_irq);
#ifdef CONFIG_SMP
err = mpic_ipi_init(mpic, node);

2
drivers/irqchip/irq-clps711x.c
View File

@ -191,7 +191,7 @@ static int __init _clps711x_intc_init(struct device_node *np,
goto out_irqfree;
}
irq_set_default_host(clps711x_intc->domain);
irq_set_default_domain(clps711x_intc->domain);
set_handle_irq(clps711x_irqh);
#ifdef CONFIG_FIQ

2
drivers/irqchip/irq-imx-gpcv2.c
View File

@ -247,7 +247,7 @@ static int __init imx_gpcv2_irqchip_init(struct device_node *node,
kfree(cd);
return -ENOMEM;
}
irq_set_default_host(domain);
irq_set_default_domain(domain);
/* Initially mask all interrupts */
for (i = 0; i < IMR_NUM; i++) {

2
drivers/irqchip/irq-pic32-evic.c
View File

@ -291,7 +291,7 @@ static int __init pic32_of_init(struct device_node *node,
gc->private = &priv[i];
}
irq_set_default_host(evic_irq_domain);
irq_set_default_domain(evic_irq_domain);
/*
* External interrupts have software configurable edge polarity. These

2
drivers/irqchip/irq-xilinx-intc.c
View File

@ -233,7 +233,7 @@ static int __init xilinx_intc_of_init(struct device_node *intc,
}
} else {
primary_intc = irqc;
irq_set_default_host(primary_intc->root_domain);
irq_set_default_domain(primary_intc->root_domain);
set_handle_irq(xil_intc_handle_irq);
}

2
drivers/irqchip/irq-xtensa-mx.c
View File

@ -156,7 +156,7 @@ static void __init xtensa_mx_init_common(struct irq_domain *root_domain)
{
unsigned int i;
irq_set_default_host(root_domain);
irq_set_default_domain(root_domain);
secondary_init_irq();
/* Initialize default IRQ routing to CPU 0 */

4
drivers/irqchip/irq-xtensa-pic.c
View File

@ -87,7 +87,7 @@ int __init xtensa_pic_init_legacy(struct device_node *interrupt_parent)
struct irq_domain *root_domain =
irq_domain_add_legacy(NULL, NR_IRQS - 1, 1, 0,
&xtensa_irq_domain_ops, &xtensa_irq_chip);
irq_set_default_host(root_domain);
irq_set_default_domain(root_domain);
return 0;
}
@ -97,7 +97,7 @@ static int __init xtensa_pic_init(struct device_node *np,
struct irq_domain *root_domain =
irq_domain_add_linear(np, NR_IRQS, &xtensa_irq_domain_ops,
&xtensa_irq_chip);
irq_set_default_host(root_domain);
irq_set_default_domain(root_domain);
return 0;
}
IRQCHIP_DECLARE(xtensa_irq_chip, "cdns,xtensa-pic", xtensa_pic_init);

16
include/linux/irqdomain.h
View File

@ -72,7 +72,7 @@ void of_phandle_args_to_fwspec(struct device_node *np, const u32 *args,
/**
* struct irq_domain_ops - Methods for irq_domain objects
* @match: Match an interrupt controller device node to a host, returns
* @match: Match an interrupt controller device node to a domain, returns
* 1 on a match
* @select: Match an interrupt controller fw specification. It is more generic
* than @match as it receives a complete struct irq_fwspec. Therefore,
@ -352,8 +352,8 @@ struct irq_domain *irq_domain_create_legacy(struct fwnode_handle *fwnode,
void *host_data);
struct irq_domain *irq_find_matching_fwspec(struct irq_fwspec *fwspec,
enum irq_domain_bus_token bus_token);
void irq_set_default_host(struct irq_domain *host);
struct irq_domain *irq_get_default_host(void);
void irq_set_default_domain(struct irq_domain *domain);
struct irq_domain *irq_get_default_domain(void);
int irq_domain_alloc_descs(int virq, unsigned int nr_irqs,
irq_hw_number_t hwirq, int node,
const struct irq_affinity_desc *affinity);
@ -454,7 +454,7 @@ static inline struct irq_domain *irq_domain_add_nomap(struct device_node *of_nod
return IS_ERR(d) ? NULL : d;
}
unsigned int irq_create_direct_mapping(struct irq_domain *host);
unsigned int irq_create_direct_mapping(struct irq_domain *domain);
#endif
static inline struct irq_domain *irq_domain_add_tree(struct device_node *of_node,
@ -507,7 +507,7 @@ static inline struct irq_domain *irq_domain_create_tree(struct fwnode_handle *fw
return IS_ERR(d) ? NULL : d;
}
void irq_domain_remove(struct irq_domain *host);
void irq_domain_remove(struct irq_domain *domain);
int irq_domain_associate(struct irq_domain *domain, unsigned int irq,
irq_hw_number_t hwirq);
@ -515,16 +515,16 @@ void irq_domain_associate_many(struct irq_domain *domain,
unsigned int irq_base,
irq_hw_number_t hwirq_base, int count);
unsigned int irq_create_mapping_affinity(struct irq_domain *host,
unsigned int irq_create_mapping_affinity(struct irq_domain *domain,
irq_hw_number_t hwirq,
const struct irq_affinity_desc *affinity);
unsigned int irq_create_fwspec_mapping(struct irq_fwspec *fwspec);
void irq_dispose_mapping(unsigned int virq);
static inline unsigned int irq_create_mapping(struct irq_domain *host,
static inline unsigned int irq_create_mapping(struct irq_domain *domain,
irq_hw_number_t hwirq)
{
return irq_create_mapping_affinity(host, hwirq, NULL);
return irq_create_mapping_affinity(domain, hwirq, NULL);
}
struct irq_desc *__irq_resolve_mapping(struct irq_domain *domain,

14
kernel/irq/irqdomain.c
View File

@ -398,7 +398,7 @@ void irq_domain_remove(struct irq_domain *domain)
* If the going away domain is the default one, reset it.
*/
if (unlikely(irq_default_domain == domain))
irq_set_default_host(NULL);
irq_set_default_domain(NULL);
mutex_unlock(&irq_domain_mutex);
@ -573,7 +573,7 @@ struct irq_domain *irq_find_matching_fwspec(struct irq_fwspec *fwspec,
EXPORT_SYMBOL_GPL(irq_find_matching_fwspec);
/**
* irq_set_default_host() - Set a "default" irq domain
* irq_set_default_domain() - Set a "default" irq domain
* @domain: default domain pointer
*
* For convenience, it's possible to set a "default" domain that will be used
@ -581,16 +581,16 @@ EXPORT_SYMBOL_GPL(irq_find_matching_fwspec);
* platforms that want to manipulate a few hard coded interrupt numbers that
* aren't properly represented in the device-tree.
*/
void irq_set_default_host(struct irq_domain *domain)
void irq_set_default_domain(struct irq_domain *domain)
{
pr_debug("Default domain set to @0x%p\n", domain);
irq_default_domain = domain;
}
EXPORT_SYMBOL_GPL(irq_set_default_host);
EXPORT_SYMBOL_GPL(irq_set_default_domain);
/**
* irq_get_default_host() - Retrieve the "default" irq domain
* irq_get_default_domain() - Retrieve the "default" irq domain
*
* Returns: the default domain, if any.
*
@ -598,11 +598,11 @@ EXPORT_SYMBOL_GPL(irq_set_default_host);
* systems that cannot implement a firmware->fwnode mapping (which
* both DT and ACPI provide).
*/
struct irq_domain *irq_get_default_host(void)
struct irq_domain *irq_get_default_domain(void)
{
return irq_default_domain;
}
EXPORT_SYMBOL_GPL(irq_get_default_host);
EXPORT_SYMBOL_GPL(irq_get_default_domain);
static bool irq_domain_is_nomap(struct irq_domain *domain)
{

2
kernel/irq/migration.c
View File

@ -37,7 +37,7 @@ bool irq_fixup_move_pending(struct irq_desc *desc, bool force_clear)
void irq_force_complete_move(struct irq_desc *desc)
{
for (struct irq_data *d = irq_desc_get_irq_data(desc); d; d = d->parent_data) {
for (struct irq_data *d = irq_desc_get_irq_data(desc); d; d = irqd_get_parent_data(d)) {
if (d->chip && d->chip->irq_force_complete_move) {
d->chip->irq_force_complete_move(d);
return;