mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/
synced 2025-04-19 20:58:31 +09:00
remoteproc updates for v6.15
The i.MX8MP DSP remoteproc driver is transitioned to use the reset framework for driving the run/stall reset bits. Support for managing the modem remoteprocessor on the Qualocmm MSM8226, MSM8926, and SM8750 platforms is added. -----BEGIN PGP SIGNATURE----- iQJJBAABCAAzFiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAmfm96IVHGFuZGVyc3Nv bkBrZXJuZWwub3JnAAoJEAsfOT8Nma3FuAIQAIhV6KtxshrxSgR5/FCMdvKJWjgz JSy9PhKVY3vmpEOcKWRXzFccKKLEGOp3y+Etyv9j9NwlvTWW5Xdsh+QggF5/HVjW fHy4zwvAclN/OQH9kqrvRy+5Pygzi/Hz532e+uYd0PiYxvR2uLhdatEE6kit2WKi NK0P2migYoZUYHwCOboJEUJhvP9Ui71r505203HtNwlVOUsdpsUnJsezZBsslgXW fogZl5QOM5RORxGUuMez33napDdPSicHSTe1b1Bxrp+1HBPbFNWtnGk2j0L/4QCI VjKszf/dVRDjmEGNs+rErjmqjOPW3R3gcn1LmQlgEn5RTLyuETLdEj2FngeDQ3+k ScjVYNt+kcDTgi383nRTIpS+zcWjKmqLgzK+RNVDtEhcIz8aGndncKFpRlhwoaiU qYkwmmsfIJpEUupk4OxLUHeNDVGwax6dbpostFbzIjEZrAGDBaP9NvNq+9itxNrD D8sFdVY8ULLYYJfryDPRjgr0dyaPEehdlg9Hu3CAnVw+tQfxZ9/ySGb2TLIzV2S8 gsYQqkHfZ6HfPfta7YrhLE6D7LWcQL2P3f7XyXK93xwPXEQ+QZfv+hQzQ1aPX1Px 8u0fs/Lnr63KtgL5YZDWji6n/73E6UgjXjfUpNqRAfx+GRK6cKVmo0Fjc1Xae4mU syY5vaOKSQAUiVif =Nkpi -----END PGP SIGNATURE----- Merge tag 'rproc-v6.15' of git://git.kernel.org/pub/scm/linux/kernel/git/remoteproc/linux Pull remoteproc updates from Bjorn Andersson: - Transition the i.MX8MP DSP remoteproc driver to use the reset framework for driving the run/stall reset bits - Add support for managing the modem remoteprocessor on the Qualcomm MSM8226, MSM8926, and SM8750 platforms * tag 'rproc-v6.15' of git://git.kernel.org/pub/scm/linux/kernel/git/remoteproc/linux: (28 commits) remoteproc: qcom_q6v5_pas: Make single-PD handling more robust remoteproc: qcom_q6v5_pas: Use resource with CX PD for MSM8226 remoteproc: core: Clear table_sz when rproc_shutdown remoteproc: sysmon: Update qcom_add_sysmon_subdev() comment dt-bindings: remoteproc: Consolidate SC8180X and SM8150 PAS files irqdomain: remoteproc: Switch to of_fwnode_handle() remoteproc: qcom: pas: add minidump_id to SC7280 WPSS remoteproc: imx_dsp_rproc: Document run_stall struct member remoteproc: qcom: pas: Add SM8750 MPSS dt-bindings: remoteproc: Add SM8750 MPSS imx_dsp_rproc: Use reset controller API to control the DSP reset: imx8mp-audiomix: Add support for DSP run/stall reset: imx8mp-audiomix: Introduce active_low configuration option reset: imx8mp-audiomix: Prepare the code for more reset bits reset: imx8mp-audiomix: Add prefix for internal macro dt-bindings: dsp: fsl,dsp: Add resets property dt-bindings: reset: audiomix: Add reset ids for EARC and DSP remoteproc: qcom_wcnss: Handle platforms with only single power domain dt-bindings: remoteproc: qcom,wcnss-pil: Add support for single power-domain platforms remoteproc: qcom_q6v5_mss: Add modem support on MSM8926 ...
This commit is contained in:
Linus Torvalds
commit
472863ab2a
@ -82,6 +82,15 @@ properties:
|
||||
description:
|
||||
Phandle to syscon block which provide access for processor enablement
|
||||
|
||||
resets:
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||||
minItems: 1
|
||||
|
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reset-names:
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minItems: 1
|
||||
items:
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- const: runstall
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- const: softreset
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||||
|
||||
required:
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||||
- compatible
|
||||
- reg
|
||||
@ -164,6 +173,17 @@ allOf:
|
||||
- const: txdb1
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||||
- const: rxdb0
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- const: rxdb1
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- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
enum:
|
||||
- fsl,imx8mp-dsp
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- fsl,imx8mp-hifi4
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then:
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required:
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- resets
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- reset-names
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||||
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additionalProperties: false
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@ -186,6 +206,7 @@ examples:
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};
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- |
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#include <dt-bindings/clock/imx8mp-clock.h>
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#include <dt-bindings/reset/imx8mp-reset-audiomix.h>
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dsp_reserved: dsp@92400000 {
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reg = <0x92400000 0x1000000>;
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no-map;
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@ -220,5 +241,6 @@ examples:
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<&mu2 3 0>;
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memory-region = <&dsp_vdev0buffer>, <&dsp_vdev0vring0>,
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<&dsp_vdev0vring1>, <&dsp_reserved>;
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fsl,dsp-ctrl = <&audio_blk_ctrl>;
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resets = <&audio_blk_ctrl IMX8MP_AUDIOMIX_DSP_RUNSTALL>;
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reset-names = "runstall";
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};
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@ -17,8 +17,10 @@ properties:
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compatible:
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||||
oneOf:
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- enum:
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||||
- qcom,msm8226-mss-pil
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||||
- qcom,msm8909-mss-pil
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- qcom,msm8916-mss-pil
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- qcom,msm8926-mss-pil
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- qcom,msm8953-mss-pil
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- qcom,msm8974-mss-pil
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||||
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@ -70,16 +72,18 @@ properties:
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items:
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||||
- description: CX proxy power domain (control handed over after startup)
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- description: MX proxy power domain (control handed over after startup)
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(not valid for qcom,msm8226-mss-pil, qcom,msm8926-mss-pil
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and qcom,msm8974-mss-pil)
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- description: MSS proxy power domain (control handed over after startup)
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(only valid for qcom,msm8953-mss-pil)
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minItems: 2
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minItems: 1
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||||
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power-domain-names:
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items:
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- const: cx
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- const: mx
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- const: mx # not valid for qcom,msm8226-mss-pil, qcom-msm8926-mss-pil and qcom,msm8974-mss-pil
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- const: mss # only valid for qcom,msm8953-mss-pil
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minItems: 2
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minItems: 1
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pll-supply:
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description: PLL proxy supply (control handed over after startup)
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@ -106,6 +110,15 @@ properties:
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items:
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- const: stop
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qcom,ext-bhs-reg:
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$ref: /schemas/types.yaml#/definitions/phandle-array
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description: External power block headswitch (BHS) register
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(only valid for qcom,msm8226-mss-pil)
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items:
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- items:
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- description: phandle to external BHS syscon region
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- description: offset to the external BHS register
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qcom,halt-regs:
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$ref: /schemas/types.yaml#/definitions/phandle-array
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description:
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@ -207,17 +220,58 @@ allOf:
|
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required:
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- power-domains
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- power-domain-names
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else:
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|
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- if:
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properties:
|
||||
compatible:
|
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contains:
|
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enum:
|
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- qcom,msm8909-mss-pil
|
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- qcom,msm8916-mss-pil
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then:
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properties:
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power-domains:
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minItems: 2
|
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maxItems: 2
|
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power-domain-names:
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minItems: 2
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maxItems: 2
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|
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- if:
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properties:
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compatible:
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const: qcom,msm8974-mss-pil
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contains:
|
||||
enum:
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||||
- qcom,msm8226-mss-pil
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- qcom,msm8926-mss-pil
|
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- qcom,msm8974-mss-pil
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||||
then:
|
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properties:
|
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power-domains:
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maxItems: 1
|
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power-domain-names:
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maxItems: 1
|
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required:
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- mx-supply
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|
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- if:
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properties:
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compatible:
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||||
const: qcom,msm8226-mss-pil
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then:
|
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required:
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- qcom,ext-bhs-reg
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else:
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properties:
|
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qcom,ext-bhs-reg: false
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|
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- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
enum:
|
||||
- qcom,msm8926-mss-pil
|
||||
- qcom,msm8974-mss-pil
|
||||
then:
|
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required:
|
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- mss-supply
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|
||||
@ -1,96 +0,0 @@
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# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/remoteproc/qcom,sc8180x-pas.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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||||
|
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title: Qualcomm SC8180X Peripheral Authentication Service
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|
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maintainers:
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- Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
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|
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description:
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||||
Qualcomm SC8180X SoC Peripheral Authentication Service loads and boots
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firmware on the Qualcomm DSP Hexagon cores.
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|
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properties:
|
||||
compatible:
|
||||
enum:
|
||||
- qcom,sc8180x-adsp-pas
|
||||
- qcom,sc8180x-cdsp-pas
|
||||
- qcom,sc8180x-mpss-pas
|
||||
|
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reg:
|
||||
maxItems: 1
|
||||
|
||||
clocks:
|
||||
items:
|
||||
- description: XO clock
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||||
|
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clock-names:
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||||
items:
|
||||
- const: xo
|
||||
|
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qcom,qmp:
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$ref: /schemas/types.yaml#/definitions/phandle
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||||
description: Reference to the AOSS side-channel message RAM.
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|
||||
smd-edge: false
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||||
|
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memory-region:
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maxItems: 1
|
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description: Reference to the reserved-memory for the Hexagon core
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||||
|
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firmware-name:
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||||
maxItems: 1
|
||||
description: Firmware name for the Hexagon core
|
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|
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required:
|
||||
- compatible
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||||
- reg
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||||
- memory-region
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||||
|
||||
allOf:
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- $ref: /schemas/remoteproc/qcom,pas-common.yaml#
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||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- qcom,sc8180x-adsp-pas
|
||||
- qcom,sc8180x-cdsp-pas
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||||
then:
|
||||
properties:
|
||||
interrupts:
|
||||
maxItems: 5
|
||||
interrupt-names:
|
||||
maxItems: 5
|
||||
else:
|
||||
properties:
|
||||
interrupts:
|
||||
minItems: 6
|
||||
interrupt-names:
|
||||
minItems: 6
|
||||
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- qcom,sc8180x-adsp-pas
|
||||
- qcom,sc8180x-cdsp-pas
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||||
then:
|
||||
properties:
|
||||
power-domains:
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||||
items:
|
||||
- description: LCX power domain
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||||
- description: LMX power domain
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power-domain-names:
|
||||
items:
|
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- const: lcx
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||||
- const: lmx
|
||||
else:
|
||||
properties:
|
||||
# TODO: incomplete
|
||||
power-domains: false
|
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power-domain-names: false
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||||
|
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unevaluatedProperties: false
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||||
@ -127,7 +127,7 @@ examples:
|
||||
clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>;
|
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clock-names = "xo";
|
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|
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firmware-name = "qcom/sm6115/adsp.mdt";
|
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firmware-name = "qcom/sm6115/adsp.mbn";
|
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|
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interrupts-extended = <&intc GIC_SPI 282 IRQ_TYPE_EDGE_RISING>,
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<&adsp_smp2p_in 0 IRQ_TYPE_EDGE_RISING>,
|
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|
||||
@ -60,6 +60,9 @@ allOf:
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||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- qcom,sc8180x-adsp-pas
|
||||
- qcom,sc8180x-cdsp-pas
|
||||
- qcom,sc8180x-slpi-pas
|
||||
- qcom,sm8150-adsp-pas
|
||||
- qcom,sm8150-cdsp-pas
|
||||
- qcom,sm8150-slpi-pas
|
||||
@ -83,6 +86,8 @@ allOf:
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- qcom,sc8180x-adsp-pas
|
||||
- qcom,sc8180x-cdsp-pas
|
||||
- qcom,sm8150-adsp-pas
|
||||
- qcom,sm8150-cdsp-pas
|
||||
- qcom,sm8250-cdsp-pas
|
||||
@ -99,6 +104,7 @@ allOf:
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- qcom,sc8180x-mpss-pas
|
||||
- qcom,sm8150-mpss-pas
|
||||
then:
|
||||
properties:
|
||||
@ -115,6 +121,7 @@ allOf:
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- qcom,sc8180x-slpi-pas
|
||||
- qcom,sm8150-slpi-pas
|
||||
- qcom,sm8250-adsp-pas
|
||||
- qcom,sm8250-slpi-pas
|
||||
|
||||
@ -24,11 +24,15 @@ properties:
|
||||
- qcom,sm8650-adsp-pas
|
||||
- qcom,sm8650-cdsp-pas
|
||||
- qcom,sm8650-mpss-pas
|
||||
- qcom,sm8750-mpss-pas
|
||||
- qcom,x1e80100-adsp-pas
|
||||
- qcom,x1e80100-cdsp-pas
|
||||
- items:
|
||||
- const: qcom,sm8750-adsp-pas
|
||||
- const: qcom,sm8550-adsp-pas
|
||||
- items:
|
||||
- const: qcom,sm8750-cdsp-pas
|
||||
- const: qcom,sm8650-cdsp-pas
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
@ -114,6 +118,23 @@ allOf:
|
||||
memory-region:
|
||||
minItems: 3
|
||||
maxItems: 3
|
||||
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
enum:
|
||||
- qcom,sm8750-cdsp-pas
|
||||
then:
|
||||
properties:
|
||||
interrupts:
|
||||
maxItems: 6
|
||||
interrupt-names:
|
||||
maxItems: 6
|
||||
memory-region:
|
||||
minItems: 3
|
||||
maxItems: 3
|
||||
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
@ -144,6 +165,21 @@ allOf:
|
||||
minItems: 5
|
||||
maxItems: 5
|
||||
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- qcom,sm8750-mpss-pas
|
||||
then:
|
||||
properties:
|
||||
interrupts:
|
||||
minItems: 6
|
||||
interrupt-names:
|
||||
minItems: 6
|
||||
memory-region:
|
||||
minItems: 4
|
||||
maxItems: 4
|
||||
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
@ -171,6 +207,7 @@ allOf:
|
||||
- qcom,sdx75-mpss-pas
|
||||
- qcom,sm8550-mpss-pas
|
||||
- qcom,sm8650-mpss-pas
|
||||
- qcom,sm8750-mpss-pas
|
||||
then:
|
||||
properties:
|
||||
power-domains:
|
||||
@ -184,10 +221,11 @@ allOf:
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- qcom,sm8550-cdsp-pas
|
||||
- qcom,sm8650-cdsp-pas
|
||||
- qcom,x1e80100-cdsp-pas
|
||||
contains:
|
||||
enum:
|
||||
- qcom,sm8550-cdsp-pas
|
||||
- qcom,sm8650-cdsp-pas
|
||||
- qcom,x1e80100-cdsp-pas
|
||||
then:
|
||||
properties:
|
||||
power-domains:
|
||||
|
||||
@ -69,9 +69,11 @@ properties:
|
||||
CX regulator to be held on behalf of the booting of the WCNSS core.
|
||||
|
||||
power-domains:
|
||||
minItems: 1
|
||||
maxItems: 2
|
||||
|
||||
power-domain-names:
|
||||
minItems: 1
|
||||
items:
|
||||
- const: cx
|
||||
- const: mx
|
||||
@ -187,22 +189,43 @@ allOf:
|
||||
- qcom,pronto-v1-pil
|
||||
- qcom,pronto-v2-pil
|
||||
then:
|
||||
properties:
|
||||
vddmx-supply:
|
||||
deprecated: true
|
||||
description: Deprecated for qcom,pronto-v1/2-pil
|
||||
|
||||
vddcx-supply:
|
||||
deprecated: true
|
||||
description: Deprecated for qcom,pronto-v1/2-pil
|
||||
|
||||
# CX and MX must be present either as power domains or regulators
|
||||
oneOf:
|
||||
# Both CX and MX represented as power domains
|
||||
- required:
|
||||
- power-domains
|
||||
- power-domain-names
|
||||
properties:
|
||||
power-domains:
|
||||
minItems: 2
|
||||
power-domain-names:
|
||||
minItems: 2
|
||||
vddmx-supply: false
|
||||
vddcx-supply: false
|
||||
# CX represented as power domain, MX as regulator
|
||||
- required:
|
||||
- power-domains
|
||||
- power-domain-names
|
||||
- vddmx-supply
|
||||
properties:
|
||||
power-domains:
|
||||
maxItems: 1
|
||||
power-domain-names:
|
||||
maxItems: 1
|
||||
vddcx-supply: false
|
||||
# Both CX and MX represented as regulators
|
||||
- required:
|
||||
- vddmx-supply
|
||||
- vddcx-supply
|
||||
properties:
|
||||
power-domains: false
|
||||
power-domain-names: false
|
||||
vddmx-supply:
|
||||
deprecated: true
|
||||
description: Deprecated for qcom,pronto-v1/2-pil
|
||||
vddcx-supply:
|
||||
deprecated: true
|
||||
description: Deprecated for qcom,pronto-v1/2-pil
|
||||
|
||||
- if:
|
||||
properties:
|
||||
@ -212,6 +235,10 @@ allOf:
|
||||
- qcom,pronto-v3-pil
|
||||
then:
|
||||
properties:
|
||||
power-domains:
|
||||
minItems: 2
|
||||
power-domain-names:
|
||||
minItems: 2
|
||||
vddmx-supply: false
|
||||
vddcx-supply: false
|
||||
|
||||
|
||||
@ -19,6 +19,7 @@
|
||||
#include <linux/pm_runtime.h>
|
||||
#include <linux/regmap.h>
|
||||
#include <linux/remoteproc.h>
|
||||
#include <linux/reset.h>
|
||||
#include <linux/slab.h>
|
||||
|
||||
#include "imx_rproc.h"
|
||||
@ -95,6 +96,7 @@ enum imx_dsp_rp_mbox_messages {
|
||||
/**
|
||||
* struct imx_dsp_rproc - DSP remote processor state
|
||||
* @regmap: regmap handler
|
||||
* @run_stall: reset control handle used for Run/Stall operation
|
||||
* @rproc: rproc handler
|
||||
* @dsp_dcfg: device configuration pointer
|
||||
* @clks: clocks needed by this device
|
||||
@ -111,6 +113,7 @@ enum imx_dsp_rp_mbox_messages {
|
||||
*/
|
||||
struct imx_dsp_rproc {
|
||||
struct regmap *regmap;
|
||||
struct reset_control *run_stall;
|
||||
struct rproc *rproc;
|
||||
const struct imx_dsp_rproc_dcfg *dsp_dcfg;
|
||||
struct clk_bulk_data clks[DSP_RPROC_CLK_MAX];
|
||||
@ -192,9 +195,7 @@ static int imx8mp_dsp_reset(struct imx_dsp_rproc *priv)
|
||||
/* Keep reset asserted for 10 cycles */
|
||||
usleep_range(1, 2);
|
||||
|
||||
regmap_update_bits(priv->regmap, IMX8M_AudioDSP_REG2,
|
||||
IMX8M_AudioDSP_REG2_RUNSTALL,
|
||||
IMX8M_AudioDSP_REG2_RUNSTALL);
|
||||
reset_control_assert(priv->run_stall);
|
||||
|
||||
/* Take the DSP out of reset and keep stalled for FW loading */
|
||||
pwrctl = readl(dap + IMX8M_DAP_PWRCTL);
|
||||
@ -231,13 +232,9 @@ static int imx8ulp_dsp_reset(struct imx_dsp_rproc *priv)
|
||||
|
||||
/* Specific configuration for i.MX8MP */
|
||||
static const struct imx_rproc_dcfg dsp_rproc_cfg_imx8mp = {
|
||||
.src_reg = IMX8M_AudioDSP_REG2,
|
||||
.src_mask = IMX8M_AudioDSP_REG2_RUNSTALL,
|
||||
.src_start = 0,
|
||||
.src_stop = IMX8M_AudioDSP_REG2_RUNSTALL,
|
||||
.att = imx_dsp_rproc_att_imx8mp,
|
||||
.att_size = ARRAY_SIZE(imx_dsp_rproc_att_imx8mp),
|
||||
.method = IMX_RPROC_MMIO,
|
||||
.method = IMX_RPROC_RESET_CONTROLLER,
|
||||
};
|
||||
|
||||
static const struct imx_dsp_rproc_dcfg imx_dsp_rproc_cfg_imx8mp = {
|
||||
@ -329,6 +326,9 @@ static int imx_dsp_rproc_start(struct rproc *rproc)
|
||||
true,
|
||||
rproc->bootaddr);
|
||||
break;
|
||||
case IMX_RPROC_RESET_CONTROLLER:
|
||||
ret = reset_control_deassert(priv->run_stall);
|
||||
break;
|
||||
default:
|
||||
return -EOPNOTSUPP;
|
||||
}
|
||||
@ -369,6 +369,9 @@ static int imx_dsp_rproc_stop(struct rproc *rproc)
|
||||
false,
|
||||
rproc->bootaddr);
|
||||
break;
|
||||
case IMX_RPROC_RESET_CONTROLLER:
|
||||
ret = reset_control_assert(priv->run_stall);
|
||||
break;
|
||||
default:
|
||||
return -EOPNOTSUPP;
|
||||
}
|
||||
@ -995,6 +998,13 @@ static int imx_dsp_rproc_detect_mode(struct imx_dsp_rproc *priv)
|
||||
|
||||
priv->regmap = regmap;
|
||||
break;
|
||||
case IMX_RPROC_RESET_CONTROLLER:
|
||||
priv->run_stall = devm_reset_control_get_exclusive(dev, "runstall");
|
||||
if (IS_ERR(priv->run_stall)) {
|
||||
dev_err(dev, "Failed to get DSP runstall reset control\n");
|
||||
return PTR_ERR(priv->run_stall);
|
||||
}
|
||||
break;
|
||||
default:
|
||||
ret = -EOPNOTSUPP;
|
||||
break;
|
||||
|
||||
@ -24,6 +24,8 @@ enum imx_rproc_method {
|
||||
IMX_RPROC_SMC,
|
||||
/* Through System Control Unit API */
|
||||
IMX_RPROC_SCU_API,
|
||||
/* Through Reset Controller API */
|
||||
IMX_RPROC_RESET_CONTROLLER,
|
||||
};
|
||||
|
||||
/* dcfg flags */
|
||||
|
||||
@ -724,6 +724,7 @@ out:
|
||||
* @rproc: remote processor to apply the address translation for
|
||||
* @da: device address to translate
|
||||
* @len: length of the memory buffer
|
||||
* @is_iomem: pointer filled in to indicate if @da is iomapped memory
|
||||
*
|
||||
* Custom function implementing the rproc .da_to_va ops to provide address
|
||||
* translation (device address to kernel virtual address) for internal RAMs
|
||||
|
||||
@ -563,7 +563,7 @@ static int pru_handle_intrmap(struct rproc *rproc)
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
fwspec.fwnode = of_node_to_fwnode(irq_parent);
|
||||
fwspec.fwnode = of_fwnode_handle(irq_parent);
|
||||
fwspec.param_count = 3;
|
||||
for (i = 0; i < pru->evt_count; i++) {
|
||||
fwspec.param[0] = rsc->pru_intc_map[i].event;
|
||||
|
||||
@ -134,6 +134,11 @@
|
||||
#define BOOT_FSM_TIMEOUT 10000
|
||||
#define BHS_CHECK_MAX_LOOPS 200
|
||||
|
||||
/* External power block headswitch */
|
||||
#define EXTERNAL_BHS_ON BIT(0)
|
||||
#define EXTERNAL_BHS_STATUS BIT(4)
|
||||
#define EXTERNAL_BHS_TIMEOUT_US 50
|
||||
|
||||
struct reg_info {
|
||||
struct regulator *reg;
|
||||
int uV;
|
||||
@ -161,6 +166,7 @@ struct rproc_hexagon_res {
|
||||
bool has_mba_logs;
|
||||
bool has_spare_reg;
|
||||
bool has_qaccept_regs;
|
||||
bool has_ext_bhs_reg;
|
||||
bool has_ext_cntl_regs;
|
||||
bool has_vq6;
|
||||
};
|
||||
@ -180,6 +186,7 @@ struct q6v5 {
|
||||
u32 halt_nc;
|
||||
u32 halt_vq6;
|
||||
u32 conn_box;
|
||||
u32 ext_bhs;
|
||||
|
||||
u32 qaccept_mdm;
|
||||
u32 qaccept_cx;
|
||||
@ -237,6 +244,7 @@ struct q6v5 {
|
||||
bool has_mba_logs;
|
||||
bool has_spare_reg;
|
||||
bool has_qaccept_regs;
|
||||
bool has_ext_bhs_reg;
|
||||
bool has_ext_cntl_regs;
|
||||
bool has_vq6;
|
||||
u64 mpss_perm;
|
||||
@ -246,8 +254,10 @@ struct q6v5 {
|
||||
};
|
||||
|
||||
enum {
|
||||
MSS_MSM8226,
|
||||
MSS_MSM8909,
|
||||
MSS_MSM8916,
|
||||
MSS_MSM8926,
|
||||
MSS_MSM8953,
|
||||
MSS_MSM8974,
|
||||
MSS_MSM8996,
|
||||
@ -415,6 +425,34 @@ static void q6v5_pds_disable(struct q6v5 *qproc, struct device **pds,
|
||||
}
|
||||
}
|
||||
|
||||
static int q6v5_external_bhs_enable(struct q6v5 *qproc)
|
||||
{
|
||||
u32 val;
|
||||
int ret = 0;
|
||||
|
||||
/*
|
||||
* Enable external power block headswitch and wait for it to
|
||||
* stabilize
|
||||
*/
|
||||
regmap_set_bits(qproc->conn_map, qproc->ext_bhs, EXTERNAL_BHS_ON);
|
||||
|
||||
ret = regmap_read_poll_timeout(qproc->conn_map, qproc->ext_bhs,
|
||||
val, val & EXTERNAL_BHS_STATUS,
|
||||
1, EXTERNAL_BHS_TIMEOUT_US);
|
||||
|
||||
if (ret) {
|
||||
dev_err(qproc->dev, "External BHS timed out\n");
|
||||
ret = -ETIMEDOUT;
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static void q6v5_external_bhs_disable(struct q6v5 *qproc)
|
||||
{
|
||||
regmap_clear_bits(qproc->conn_map, qproc->ext_bhs, EXTERNAL_BHS_ON);
|
||||
}
|
||||
|
||||
static int q6v5_xfer_mem_ownership(struct q6v5 *qproc, u64 *current_perm,
|
||||
bool local, bool remote, phys_addr_t addr,
|
||||
size_t size)
|
||||
@ -1112,11 +1150,17 @@ static int q6v5_mba_load(struct q6v5 *qproc)
|
||||
goto disable_proxy_clk;
|
||||
}
|
||||
|
||||
if (qproc->has_ext_bhs_reg) {
|
||||
ret = q6v5_external_bhs_enable(qproc);
|
||||
if (ret < 0)
|
||||
goto disable_vdd;
|
||||
}
|
||||
|
||||
ret = q6v5_clk_enable(qproc->dev, qproc->reset_clks,
|
||||
qproc->reset_clk_count);
|
||||
if (ret) {
|
||||
dev_err(qproc->dev, "failed to enable reset clocks\n");
|
||||
goto disable_vdd;
|
||||
goto disable_ext_bhs;
|
||||
}
|
||||
|
||||
ret = q6v5_reset_deassert(qproc);
|
||||
@ -1214,6 +1258,9 @@ assert_reset:
|
||||
disable_reset_clks:
|
||||
q6v5_clk_disable(qproc->dev, qproc->reset_clks,
|
||||
qproc->reset_clk_count);
|
||||
disable_ext_bhs:
|
||||
if (qproc->has_ext_bhs_reg)
|
||||
q6v5_external_bhs_disable(qproc);
|
||||
disable_vdd:
|
||||
q6v5_regulator_disable(qproc, qproc->active_regs,
|
||||
qproc->active_reg_count);
|
||||
@ -1281,6 +1328,8 @@ static void q6v5_mba_reclaim(struct q6v5 *qproc)
|
||||
qproc->reset_clk_count);
|
||||
q6v5_clk_disable(qproc->dev, qproc->active_clks,
|
||||
qproc->active_clk_count);
|
||||
if (qproc->has_ext_bhs_reg)
|
||||
q6v5_external_bhs_disable(qproc);
|
||||
q6v5_regulator_disable(qproc, qproc->active_regs,
|
||||
qproc->active_reg_count);
|
||||
|
||||
@ -1750,6 +1799,23 @@ static int q6v5_init_mem(struct q6v5 *qproc, struct platform_device *pdev)
|
||||
qproc->qaccept_axi = args.args[2];
|
||||
}
|
||||
|
||||
if (qproc->has_ext_bhs_reg) {
|
||||
ret = of_parse_phandle_with_fixed_args(pdev->dev.of_node,
|
||||
"qcom,ext-bhs-reg",
|
||||
1, 0, &args);
|
||||
if (ret < 0) {
|
||||
dev_err(&pdev->dev, "failed to parse ext-bhs-reg index 0\n");
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
qproc->conn_map = syscon_node_to_regmap(args.np);
|
||||
of_node_put(args.np);
|
||||
if (IS_ERR(qproc->conn_map))
|
||||
return PTR_ERR(qproc->conn_map);
|
||||
|
||||
qproc->ext_bhs = args.args[0];
|
||||
}
|
||||
|
||||
if (qproc->has_ext_cntl_regs) {
|
||||
ret = of_parse_phandle_with_fixed_args(pdev->dev.of_node,
|
||||
"qcom,ext-regs",
|
||||
@ -1831,6 +1897,13 @@ static int q6v5_pds_attach(struct device *dev, struct device **devs,
|
||||
while (pd_names[num_pds])
|
||||
num_pds++;
|
||||
|
||||
/* Handle single power domain */
|
||||
if (num_pds == 1 && dev->pm_domain) {
|
||||
devs[0] = dev;
|
||||
pm_runtime_enable(dev);
|
||||
return 1;
|
||||
}
|
||||
|
||||
for (i = 0; i < num_pds; i++) {
|
||||
devs[i] = dev_pm_domain_attach_by_name(dev, pd_names[i]);
|
||||
if (IS_ERR_OR_NULL(devs[i])) {
|
||||
@ -1851,8 +1924,15 @@ unroll_attach:
|
||||
static void q6v5_pds_detach(struct q6v5 *qproc, struct device **pds,
|
||||
size_t pd_count)
|
||||
{
|
||||
struct device *dev = qproc->dev;
|
||||
int i;
|
||||
|
||||
/* Handle single power domain */
|
||||
if (pd_count == 1 && dev->pm_domain) {
|
||||
pm_runtime_disable(dev);
|
||||
return;
|
||||
}
|
||||
|
||||
for (i = 0; i < pd_count; i++)
|
||||
dev_pm_domain_detach(pds[i], false);
|
||||
}
|
||||
@ -2007,6 +2087,7 @@ static int q6v5_probe(struct platform_device *pdev)
|
||||
platform_set_drvdata(pdev, qproc);
|
||||
|
||||
qproc->has_qaccept_regs = desc->has_qaccept_regs;
|
||||
qproc->has_ext_bhs_reg = desc->has_ext_bhs_reg;
|
||||
qproc->has_ext_cntl_regs = desc->has_ext_cntl_regs;
|
||||
qproc->has_vq6 = desc->has_vq6;
|
||||
qproc->has_spare_reg = desc->has_spare_reg;
|
||||
@ -2160,6 +2241,7 @@ static const struct rproc_hexagon_res sc7180_mss = {
|
||||
.has_mba_logs = true,
|
||||
.has_spare_reg = true,
|
||||
.has_qaccept_regs = false,
|
||||
.has_ext_bhs_reg = false,
|
||||
.has_ext_cntl_regs = false,
|
||||
.has_vq6 = false,
|
||||
.version = MSS_SC7180,
|
||||
@ -2188,6 +2270,7 @@ static const struct rproc_hexagon_res sc7280_mss = {
|
||||
.has_mba_logs = true,
|
||||
.has_spare_reg = false,
|
||||
.has_qaccept_regs = true,
|
||||
.has_ext_bhs_reg = false,
|
||||
.has_ext_cntl_regs = true,
|
||||
.has_vq6 = true,
|
||||
.version = MSS_SC7280,
|
||||
@ -2219,6 +2302,7 @@ static const struct rproc_hexagon_res sdm660_mss = {
|
||||
.has_mba_logs = false,
|
||||
.has_spare_reg = false,
|
||||
.has_qaccept_regs = false,
|
||||
.has_ext_bhs_reg = false,
|
||||
.has_ext_cntl_regs = false,
|
||||
.has_vq6 = false,
|
||||
.version = MSS_SDM660,
|
||||
@ -2254,6 +2338,7 @@ static const struct rproc_hexagon_res sdm845_mss = {
|
||||
.has_mba_logs = false,
|
||||
.has_spare_reg = false,
|
||||
.has_qaccept_regs = false,
|
||||
.has_ext_bhs_reg = false,
|
||||
.has_ext_cntl_regs = false,
|
||||
.has_vq6 = false,
|
||||
.version = MSS_SDM845,
|
||||
@ -2285,6 +2370,7 @@ static const struct rproc_hexagon_res msm8998_mss = {
|
||||
.has_mba_logs = false,
|
||||
.has_spare_reg = false,
|
||||
.has_qaccept_regs = false,
|
||||
.has_ext_bhs_reg = false,
|
||||
.has_ext_cntl_regs = false,
|
||||
.has_vq6 = false,
|
||||
.version = MSS_MSM8998,
|
||||
@ -2323,6 +2409,7 @@ static const struct rproc_hexagon_res msm8996_mss = {
|
||||
.has_mba_logs = false,
|
||||
.has_spare_reg = false,
|
||||
.has_qaccept_regs = false,
|
||||
.has_ext_bhs_reg = false,
|
||||
.has_ext_cntl_regs = false,
|
||||
.has_vq6 = false,
|
||||
.version = MSS_MSM8996,
|
||||
@ -2357,6 +2444,7 @@ static const struct rproc_hexagon_res msm8909_mss = {
|
||||
.has_mba_logs = false,
|
||||
.has_spare_reg = false,
|
||||
.has_qaccept_regs = false,
|
||||
.has_ext_bhs_reg = false,
|
||||
.has_ext_cntl_regs = false,
|
||||
.has_vq6 = false,
|
||||
.version = MSS_MSM8909,
|
||||
@ -2402,6 +2490,7 @@ static const struct rproc_hexagon_res msm8916_mss = {
|
||||
.has_mba_logs = false,
|
||||
.has_spare_reg = false,
|
||||
.has_qaccept_regs = false,
|
||||
.has_ext_bhs_reg = false,
|
||||
.has_ext_cntl_regs = false,
|
||||
.has_vq6 = false,
|
||||
.version = MSS_MSM8916,
|
||||
@ -2437,6 +2526,7 @@ static const struct rproc_hexagon_res msm8953_mss = {
|
||||
.has_mba_logs = false,
|
||||
.has_spare_reg = false,
|
||||
.has_qaccept_regs = false,
|
||||
.has_ext_bhs_reg = false,
|
||||
.has_ext_cntl_regs = false,
|
||||
.has_vq6 = false,
|
||||
.version = MSS_MSM8953,
|
||||
@ -2449,13 +2539,13 @@ static const struct rproc_hexagon_res msm8974_mss = {
|
||||
.supply = "pll",
|
||||
.uA = 100000,
|
||||
},
|
||||
{}
|
||||
},
|
||||
.fallback_proxy_supply = (struct qcom_mss_reg_res[]) {
|
||||
{
|
||||
.supply = "mx",
|
||||
.uV = 1050000,
|
||||
},
|
||||
{}
|
||||
},
|
||||
.fallback_proxy_supply = (struct qcom_mss_reg_res[]) {
|
||||
{
|
||||
.supply = "cx",
|
||||
.uA = 100000,
|
||||
@ -2481,7 +2571,6 @@ static const struct rproc_hexagon_res msm8974_mss = {
|
||||
NULL
|
||||
},
|
||||
.proxy_pd_names = (char*[]){
|
||||
"mx",
|
||||
"cx",
|
||||
NULL
|
||||
},
|
||||
@ -2490,15 +2579,102 @@ static const struct rproc_hexagon_res msm8974_mss = {
|
||||
.has_mba_logs = false,
|
||||
.has_spare_reg = false,
|
||||
.has_qaccept_regs = false,
|
||||
.has_ext_bhs_reg = false,
|
||||
.has_ext_cntl_regs = false,
|
||||
.has_vq6 = false,
|
||||
.version = MSS_MSM8974,
|
||||
};
|
||||
|
||||
static const struct rproc_hexagon_res msm8226_mss = {
|
||||
.hexagon_mba_image = "mba.b00",
|
||||
.proxy_supply = (struct qcom_mss_reg_res[]) {
|
||||
{
|
||||
.supply = "pll",
|
||||
.uA = 100000,
|
||||
},
|
||||
{
|
||||
.supply = "mx",
|
||||
.uV = 1050000,
|
||||
},
|
||||
{}
|
||||
},
|
||||
.proxy_clk_names = (char*[]){
|
||||
"xo",
|
||||
NULL
|
||||
},
|
||||
.active_clk_names = (char*[]){
|
||||
"iface",
|
||||
"bus",
|
||||
"mem",
|
||||
NULL
|
||||
},
|
||||
.proxy_pd_names = (char*[]){
|
||||
"cx",
|
||||
NULL
|
||||
},
|
||||
.need_mem_protection = false,
|
||||
.has_alt_reset = false,
|
||||
.has_mba_logs = false,
|
||||
.has_spare_reg = false,
|
||||
.has_qaccept_regs = false,
|
||||
.has_ext_bhs_reg = true,
|
||||
.has_ext_cntl_regs = false,
|
||||
.has_vq6 = false,
|
||||
.version = MSS_MSM8226,
|
||||
};
|
||||
|
||||
static const struct rproc_hexagon_res msm8926_mss = {
|
||||
.hexagon_mba_image = "mba.b00",
|
||||
.proxy_supply = (struct qcom_mss_reg_res[]) {
|
||||
{
|
||||
.supply = "pll",
|
||||
.uA = 100000,
|
||||
},
|
||||
{
|
||||
.supply = "mx",
|
||||
.uV = 1050000,
|
||||
},
|
||||
{}
|
||||
},
|
||||
.active_supply = (struct qcom_mss_reg_res[]) {
|
||||
{
|
||||
.supply = "mss",
|
||||
.uV = 1050000,
|
||||
.uA = 100000,
|
||||
},
|
||||
{}
|
||||
},
|
||||
.proxy_clk_names = (char*[]){
|
||||
"xo",
|
||||
NULL
|
||||
},
|
||||
.active_clk_names = (char*[]){
|
||||
"iface",
|
||||
"bus",
|
||||
"mem",
|
||||
NULL
|
||||
},
|
||||
.proxy_pd_names = (char*[]){
|
||||
"cx",
|
||||
NULL
|
||||
},
|
||||
.need_mem_protection = false,
|
||||
.has_alt_reset = false,
|
||||
.has_mba_logs = false,
|
||||
.has_spare_reg = false,
|
||||
.has_qaccept_regs = false,
|
||||
.has_ext_bhs_reg = false,
|
||||
.has_ext_cntl_regs = false,
|
||||
.has_vq6 = false,
|
||||
.version = MSS_MSM8926,
|
||||
};
|
||||
|
||||
static const struct of_device_id q6v5_of_match[] = {
|
||||
{ .compatible = "qcom,q6v5-pil", .data = &msm8916_mss},
|
||||
{ .compatible = "qcom,msm8226-mss-pil", .data = &msm8226_mss},
|
||||
{ .compatible = "qcom,msm8909-mss-pil", .data = &msm8909_mss},
|
||||
{ .compatible = "qcom,msm8916-mss-pil", .data = &msm8916_mss},
|
||||
{ .compatible = "qcom,msm8926-mss-pil", .data = &msm8926_mss},
|
||||
{ .compatible = "qcom,msm8953-mss-pil", .data = &msm8953_mss},
|
||||
{ .compatible = "qcom,msm8974-mss-pil", .data = &msm8974_mss},
|
||||
{ .compatible = "qcom,msm8996-mss-pil", .data = &msm8996_mss},
|
||||
|
||||
@ -501,16 +501,16 @@ static int adsp_pds_attach(struct device *dev, struct device **devs,
|
||||
if (!pd_names)
|
||||
return 0;
|
||||
|
||||
while (pd_names[num_pds])
|
||||
num_pds++;
|
||||
|
||||
/* Handle single power domain */
|
||||
if (dev->pm_domain) {
|
||||
if (num_pds == 1 && dev->pm_domain) {
|
||||
devs[0] = dev;
|
||||
pm_runtime_enable(dev);
|
||||
return 1;
|
||||
}
|
||||
|
||||
while (pd_names[num_pds])
|
||||
num_pds++;
|
||||
|
||||
for (i = 0; i < num_pds; i++) {
|
||||
devs[i] = dev_pm_domain_attach_by_name(dev, pd_names[i]);
|
||||
if (IS_ERR_OR_NULL(devs[i])) {
|
||||
@ -535,7 +535,7 @@ static void adsp_pds_detach(struct qcom_adsp *adsp, struct device **pds,
|
||||
int i;
|
||||
|
||||
/* Handle single power domain */
|
||||
if (dev->pm_domain && pd_count) {
|
||||
if (pd_count == 1 && dev->pm_domain) {
|
||||
pm_runtime_disable(dev);
|
||||
return;
|
||||
}
|
||||
@ -1348,6 +1348,7 @@ static const struct adsp_data sc7280_wpss_resource = {
|
||||
.crash_reason_smem = 626,
|
||||
.firmware_name = "wpss.mdt",
|
||||
.pas_id = 6,
|
||||
.minidump_id = 4,
|
||||
.auto_boot = false,
|
||||
.proxy_pd_names = (char*[]){
|
||||
"cx",
|
||||
@ -1409,8 +1410,32 @@ static const struct adsp_data sm8650_mpss_resource = {
|
||||
.region_assign_vmid = QCOM_SCM_VMID_MSS_MSA,
|
||||
};
|
||||
|
||||
static const struct adsp_data sm8750_mpss_resource = {
|
||||
.crash_reason_smem = 421,
|
||||
.firmware_name = "modem.mdt",
|
||||
.dtb_firmware_name = "modem_dtb.mdt",
|
||||
.pas_id = 4,
|
||||
.dtb_pas_id = 0x26,
|
||||
.minidump_id = 3,
|
||||
.auto_boot = false,
|
||||
.decrypt_shutdown = true,
|
||||
.proxy_pd_names = (char*[]){
|
||||
"cx",
|
||||
"mss",
|
||||
NULL
|
||||
},
|
||||
.load_state = "modem",
|
||||
.ssr_name = "mpss",
|
||||
.sysmon_name = "modem",
|
||||
.ssctl_id = 0x12,
|
||||
.smem_host_id = 1,
|
||||
.region_assign_idx = 2,
|
||||
.region_assign_count = 2,
|
||||
.region_assign_vmid = QCOM_SCM_VMID_MSS_MSA,
|
||||
};
|
||||
|
||||
static const struct of_device_id adsp_of_match[] = {
|
||||
{ .compatible = "qcom,msm8226-adsp-pil", .data = &adsp_resource_init},
|
||||
{ .compatible = "qcom,msm8226-adsp-pil", .data = &msm8996_adsp_resource},
|
||||
{ .compatible = "qcom,msm8953-adsp-pil", .data = &msm8996_adsp_resource},
|
||||
{ .compatible = "qcom,msm8974-adsp-pil", .data = &adsp_resource_init},
|
||||
{ .compatible = "qcom,msm8996-adsp-pil", .data = &msm8996_adsp_resource},
|
||||
@ -1474,6 +1499,7 @@ static const struct of_device_id adsp_of_match[] = {
|
||||
{ .compatible = "qcom,sm8650-adsp-pas", .data = &sm8550_adsp_resource},
|
||||
{ .compatible = "qcom,sm8650-cdsp-pas", .data = &sm8650_cdsp_resource},
|
||||
{ .compatible = "qcom,sm8650-mpss-pas", .data = &sm8650_mpss_resource},
|
||||
{ .compatible = "qcom,sm8750-mpss-pas", .data = &sm8750_mpss_resource},
|
||||
{ .compatible = "qcom,x1e80100-adsp-pas", .data = &x1e80100_adsp_resource},
|
||||
{ .compatible = "qcom,x1e80100-cdsp-pas", .data = &x1e80100_cdsp_resource},
|
||||
{ },
|
||||
|
||||
@ -619,7 +619,7 @@ static irqreturn_t sysmon_shutdown_interrupt(int irq, void *data)
|
||||
* @name: name of this subdev, to use in SSR
|
||||
* @ssctl_instance: instance id of the ssctl QMI service
|
||||
*
|
||||
* Return: A new qcom_sysmon object, or NULL on failure
|
||||
* Return: A new qcom_sysmon object, or an error pointer on failure
|
||||
*/
|
||||
struct qcom_sysmon *qcom_add_sysmon_subdev(struct rproc *rproc,
|
||||
const char *name,
|
||||
|
||||
@ -117,10 +117,10 @@ static const struct wcnss_data pronto_v1_data = {
|
||||
.pmu_offset = 0x1004,
|
||||
.spare_offset = 0x1088,
|
||||
|
||||
.pd_names = { "mx", "cx" },
|
||||
.pd_names = { "cx", "mx" },
|
||||
.vregs = (struct wcnss_vreg_info[]) {
|
||||
{ "vddmx", 950000, 1150000, 0 },
|
||||
{ "vddcx", .super_turbo = true},
|
||||
{ "vddmx", 950000, 1150000, 0 },
|
||||
{ "vddpx", 1800000, 1800000, 0 },
|
||||
},
|
||||
.num_pd_vregs = 2,
|
||||
@ -131,10 +131,10 @@ static const struct wcnss_data pronto_v2_data = {
|
||||
.pmu_offset = 0x1004,
|
||||
.spare_offset = 0x1088,
|
||||
|
||||
.pd_names = { "mx", "cx" },
|
||||
.pd_names = { "cx", "mx" },
|
||||
.vregs = (struct wcnss_vreg_info[]) {
|
||||
{ "vddmx", 1287500, 1287500, 0 },
|
||||
{ "vddcx", .super_turbo = true },
|
||||
{ "vddmx", 1287500, 1287500, 0 },
|
||||
{ "vddpx", 1800000, 1800000, 0 },
|
||||
},
|
||||
.num_pd_vregs = 2,
|
||||
@ -397,8 +397,17 @@ static irqreturn_t wcnss_stop_ack_interrupt(int irq, void *dev)
|
||||
static int wcnss_init_pds(struct qcom_wcnss *wcnss,
|
||||
const char * const pd_names[WCNSS_MAX_PDS])
|
||||
{
|
||||
struct device *dev = wcnss->dev;
|
||||
int i, ret;
|
||||
|
||||
/* Handle single power domain */
|
||||
if (dev->pm_domain) {
|
||||
wcnss->pds[0] = dev;
|
||||
wcnss->num_pds = 1;
|
||||
pm_runtime_enable(dev);
|
||||
return 0;
|
||||
}
|
||||
|
||||
for (i = 0; i < WCNSS_MAX_PDS; i++) {
|
||||
if (!pd_names[i])
|
||||
break;
|
||||
@ -418,8 +427,15 @@ static int wcnss_init_pds(struct qcom_wcnss *wcnss,
|
||||
|
||||
static void wcnss_release_pds(struct qcom_wcnss *wcnss)
|
||||
{
|
||||
struct device *dev = wcnss->dev;
|
||||
int i;
|
||||
|
||||
/* Handle single power domain */
|
||||
if (wcnss->num_pds == 1 && dev->pm_domain) {
|
||||
pm_runtime_disable(dev);
|
||||
return;
|
||||
}
|
||||
|
||||
for (i = 0; i < wcnss->num_pds; i++)
|
||||
dev_pm_domain_detach(wcnss->pds[i], false);
|
||||
}
|
||||
@ -437,10 +453,13 @@ static int wcnss_init_regulators(struct qcom_wcnss *wcnss,
|
||||
* the regulators for the power domains. For old device trees we need to
|
||||
* reserve extra space to manage them through the regulator interface.
|
||||
*/
|
||||
if (wcnss->num_pds)
|
||||
info += num_pd_vregs;
|
||||
else
|
||||
if (wcnss->num_pds) {
|
||||
info += wcnss->num_pds;
|
||||
/* Handle single power domain case */
|
||||
num_vregs += num_pd_vregs - wcnss->num_pds;
|
||||
} else {
|
||||
num_vregs += num_pd_vregs;
|
||||
}
|
||||
|
||||
bulk = devm_kcalloc(wcnss->dev,
|
||||
num_vregs, sizeof(struct regulator_bulk_data),
|
||||
|
||||
@ -2025,6 +2025,7 @@ int rproc_shutdown(struct rproc *rproc)
|
||||
kfree(rproc->cached_table);
|
||||
rproc->cached_table = NULL;
|
||||
rproc->table_ptr = NULL;
|
||||
rproc->table_sz = 0;
|
||||
out:
|
||||
mutex_unlock(&rproc->lock);
|
||||
return ret;
|
||||
|
||||
@ -3,6 +3,8 @@
|
||||
* Copyright 2024 NXP
|
||||
*/
|
||||
|
||||
#include <dt-bindings/reset/imx8mp-reset-audiomix.h>
|
||||
|
||||
#include <linux/auxiliary_bus.h>
|
||||
#include <linux/device.h>
|
||||
#include <linux/io.h>
|
||||
@ -11,8 +13,36 @@
|
||||
#include <linux/of_address.h>
|
||||
#include <linux/reset-controller.h>
|
||||
|
||||
#define EARC 0x200
|
||||
#define EARC_RESET_MASK 0x3
|
||||
#define IMX8MP_AUDIOMIX_EARC_RESET_OFFSET 0x200
|
||||
#define IMX8MP_AUDIOMIX_EARC_RESET_MASK BIT(1)
|
||||
#define IMX8MP_AUDIOMIX_EARC_PHY_RESET_MASK BIT(2)
|
||||
|
||||
#define IMX8MP_AUDIOMIX_DSP_RUNSTALL_OFFSET 0x108
|
||||
#define IMX8MP_AUDIOMIX_DSP_RUNSTALL_MASK BIT(5)
|
||||
|
||||
struct imx8mp_reset_map {
|
||||
unsigned int offset;
|
||||
unsigned int mask;
|
||||
bool active_low;
|
||||
};
|
||||
|
||||
static const struct imx8mp_reset_map reset_map[] = {
|
||||
[IMX8MP_AUDIOMIX_EARC_RESET] = {
|
||||
.offset = IMX8MP_AUDIOMIX_EARC_RESET_OFFSET,
|
||||
.mask = IMX8MP_AUDIOMIX_EARC_RESET_MASK,
|
||||
.active_low = true,
|
||||
},
|
||||
[IMX8MP_AUDIOMIX_EARC_PHY_RESET] = {
|
||||
.offset = IMX8MP_AUDIOMIX_EARC_RESET_OFFSET,
|
||||
.mask = IMX8MP_AUDIOMIX_EARC_PHY_RESET_MASK,
|
||||
.active_low = true,
|
||||
},
|
||||
[IMX8MP_AUDIOMIX_DSP_RUNSTALL] = {
|
||||
.offset = IMX8MP_AUDIOMIX_DSP_RUNSTALL_OFFSET,
|
||||
.mask = IMX8MP_AUDIOMIX_DSP_RUNSTALL_MASK,
|
||||
.active_low = false,
|
||||
},
|
||||
};
|
||||
|
||||
struct imx8mp_audiomix_reset {
|
||||
struct reset_controller_dev rcdev;
|
||||
@ -25,38 +55,42 @@ static struct imx8mp_audiomix_reset *to_imx8mp_audiomix_reset(struct reset_contr
|
||||
return container_of(rcdev, struct imx8mp_audiomix_reset, rcdev);
|
||||
}
|
||||
|
||||
static int imx8mp_audiomix_reset_assert(struct reset_controller_dev *rcdev,
|
||||
unsigned long id)
|
||||
static int imx8mp_audiomix_update(struct reset_controller_dev *rcdev,
|
||||
unsigned long id, bool assert)
|
||||
{
|
||||
struct imx8mp_audiomix_reset *priv = to_imx8mp_audiomix_reset(rcdev);
|
||||
void __iomem *reg_addr = priv->base;
|
||||
unsigned int mask, reg;
|
||||
unsigned long flags;
|
||||
unsigned int mask, offset, active_low;
|
||||
unsigned long reg, flags;
|
||||
|
||||
mask = reset_map[id].mask;
|
||||
offset = reset_map[id].offset;
|
||||
active_low = reset_map[id].active_low;
|
||||
|
||||
mask = BIT(id);
|
||||
spin_lock_irqsave(&priv->lock, flags);
|
||||
reg = readl(reg_addr + EARC);
|
||||
writel(reg & ~mask, reg_addr + EARC);
|
||||
|
||||
reg = readl(reg_addr + offset);
|
||||
if (active_low ^ assert)
|
||||
reg |= mask;
|
||||
else
|
||||
reg &= ~mask;
|
||||
writel(reg, reg_addr + offset);
|
||||
|
||||
spin_unlock_irqrestore(&priv->lock, flags);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int imx8mp_audiomix_reset_assert(struct reset_controller_dev *rcdev,
|
||||
unsigned long id)
|
||||
{
|
||||
return imx8mp_audiomix_update(rcdev, id, true);
|
||||
}
|
||||
|
||||
static int imx8mp_audiomix_reset_deassert(struct reset_controller_dev *rcdev,
|
||||
unsigned long id)
|
||||
{
|
||||
struct imx8mp_audiomix_reset *priv = to_imx8mp_audiomix_reset(rcdev);
|
||||
void __iomem *reg_addr = priv->base;
|
||||
unsigned int mask, reg;
|
||||
unsigned long flags;
|
||||
|
||||
mask = BIT(id);
|
||||
spin_lock_irqsave(&priv->lock, flags);
|
||||
reg = readl(reg_addr + EARC);
|
||||
writel(reg | mask, reg_addr + EARC);
|
||||
spin_unlock_irqrestore(&priv->lock, flags);
|
||||
|
||||
return 0;
|
||||
return imx8mp_audiomix_update(rcdev, id, false);
|
||||
}
|
||||
|
||||
static const struct reset_control_ops imx8mp_audiomix_reset_ops = {
|
||||
@ -78,7 +112,7 @@ static int imx8mp_audiomix_reset_probe(struct auxiliary_device *adev,
|
||||
spin_lock_init(&priv->lock);
|
||||
|
||||
priv->rcdev.owner = THIS_MODULE;
|
||||
priv->rcdev.nr_resets = fls(EARC_RESET_MASK);
|
||||
priv->rcdev.nr_resets = ARRAY_SIZE(reset_map);
|
||||
priv->rcdev.ops = &imx8mp_audiomix_reset_ops;
|
||||
priv->rcdev.of_node = dev->parent->of_node;
|
||||
priv->rcdev.dev = dev;
|
||||
|
||||
13
include/dt-bindings/reset/imx8mp-reset-audiomix.h
Normal file
13
include/dt-bindings/reset/imx8mp-reset-audiomix.h
Normal file
@ -0,0 +1,13 @@
|
||||
/* SPDX-License-Identifier: GPL-2.0-only OR MIT */
|
||||
/*
|
||||
* Copyright 2025 NXP
|
||||
*/
|
||||
|
||||
#ifndef DT_BINDING_RESET_IMX8MP_AUDIOMIX_H
|
||||
#define DT_BINDING_RESET_IMX8MP_AUDIOMIX_H
|
||||
|
||||
#define IMX8MP_AUDIOMIX_EARC_RESET 0
|
||||
#define IMX8MP_AUDIOMIX_EARC_PHY_RESET 1
|
||||
#define IMX8MP_AUDIOMIX_DSP_RUNSTALL 2
|
||||
|
||||
#endif /* DT_BINDING_RESET_IMX8MP_AUDIOMIX_H */
|
||||
Loading…
x
Reference in New Issue
Block a user