asm-generic changes for 6.15

This is mainly set of cleanups of asm-generic/io.h, resolving problems
 with inconsistent semantics of ioread64/iowrite64 that were causing
 runtime and build issues.
 
 The "GENERIC_IOMAP" version that switches between inb()/outb() and
 readb()/writeb() style accessors is now only used on architectures that
 have PC-style ISA devices that are not memory mapped (x86, uml, m68k-q40
 and powerpc-powernv), while alpha and parisc use a more complicated
 variant and everything else just maps the ioread interfaces to plan MMIO
 (readb/writeb etc).
 
 In addition there are two small changes from Raag Jadav to simplify
 the asm-generic/io.h indirect inclusions and from Jann Horn to fix
 a corner case with read_word_at_a_time.
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmfkb2MACgkQYKtH/8kJ
 UicZMg//Va7h0cZBAM64yvHH9SJ1JrM2u4oZNspvcWuncpqaDp3/lFAUBf1m0m46
 PhZ8mJmVm/qD7DH8uJRA4kI9t0hjeI1nwb2Pgo60omEpZKY2nIJMsJMIluQYEdAt
 nthz9RUvNOu0WSR/zMVmLfEAtncNewJzyUrlTnoQnIM9S+WQ8e5f1TxZbaz754Cb
 XYOpfZNj4nyP3wXtMedee3eZiKKxs/OcZBLoGyKnrBIkUbHCucXsAL962SoI3AXr
 pMjAIVNC1588fhOc2fA9Jl3K73j8Tj7/34UM+ztd5wxI1lwepxq4EDOCyJrhF5Oh
 z7oZ4laGoIc4i1aSrUWFK10TrcSBvC9D3zvUjYL8ryYw3HrpB3VppcObpCBtpWZS
 97LGSlwq8UmkQOXt8xFzffOEDSh97ojxJAvUUUtuQtnS7PbkmyZ/OCnddBb0F7pa
 Bg68mzzZHm8/WUCMXwKxh+GA+qVZsMsPaPaexS/aG/TuV7+Mnj93GY1GSkj3Qzaw
 T9eUuGnFRCvSHU/WJ/Lrl4X1dFdWgHAbSOMNZBVfRFgSUt1ypChV1Sqt2jEfe6Uv
 dEeD84vZ0uhTsLoFVv/V4xY0osGKL+kAAtEwszLPfmP43kH+jC7cD3+CSTHW0IgV
 EHuFcjv2CraTF3wvX8Mph6ivoh1EwW/ycFm2mw8onloUUZaoMHM=
 =6j9g
 -----END PGP SIGNATURE-----

Merge tag 'asm-generic-6.15-2' of git://git.kernel.org/pub/scm/linux/kernel/git/arnd/asm-generic

Pull asm-generic updates from Arnd Bergmann:
 "This is mainly set of cleanups of asm-generic/io.h, resolving problems
  with inconsistent semantics of ioread64/iowrite64 that were causing
  runtime and build issues.

  The "GENERIC_IOMAP" version that switches between inb()/outb() and
  readb()/writeb() style accessors is now only used on architectures
  that have PC-style ISA devices that are not memory mapped (x86, uml,
  m68k-q40 and powerpc-powernv), while alpha and parisc use a more
  complicated variant and everything else just maps the ioread
  interfaces to plan MMIO (readb/writeb etc).

  In addition there are two small changes from Raag Jadav to simplify
  the asm-generic/io.h indirect inclusions and from Jann Horn to fix a
  corner case with read_word_at_a_time"

* tag 'asm-generic-6.15-2' of git://git.kernel.org/pub/scm/linux/kernel/git/arnd/asm-generic:
  rwonce: fix crash by removing READ_ONCE() for unaligned read
  rwonce: handle KCSAN like KASAN in read_word_at_a_time()
  m68k: coldfire: select PCI_IOMAP for PCI
  mips: export pci_iounmap()
  mips: fix PCI_IOBASE definition
  m68k/nommu: stop using GENERIC_IOMAP
  mips: drop GENERIC_IOMAP wrapper
  powerpc: asm/io.h: remove split ioread64/iowrite64 helpers
  parisc: stop using asm-generic/iomap.h
  sh: remove duplicate ioread/iowrite helpers
  alpha: stop using asm-generic/iomap.h
  io.h: drop unused headers
  drm/draw: include missing headers
  asm-generic/io.h: rework split ioread64/iowrite64 helpers
This commit is contained in:
Linus Torvalds 2025-03-27 09:46:53 -07:00
commit 3a90a72aca
24 changed files with 167 additions and 355 deletions

View File

@ -10,10 +10,6 @@
#include <asm/machvec.h>
#include <asm/hwrpb.h>
/* The generic header contains only prototypes. Including it ensures that
the implementation we have here matches that interface. */
#include <asm-generic/iomap.h>
/*
* Virtual -> physical identity mapping starts at this offset
*/
@ -276,13 +272,24 @@ extern void __raw_writeq(u64 b, volatile void __iomem *addr);
#define __raw_writel __raw_writel
#define __raw_writeq __raw_writeq
/*
* Mapping from port numbers to __iomem space is pretty easy.
*/
extern unsigned int ioread8(const void __iomem *);
extern unsigned int ioread16(const void __iomem *);
extern unsigned int ioread32(const void __iomem *);
extern u64 ioread64(const void __iomem *);
extern void iowrite8(u8, void __iomem *);
extern void iowrite16(u16, void __iomem *);
extern void iowrite32(u32, void __iomem *);
extern void iowrite64(u64, void __iomem *);
extern void ioread8_rep(const void __iomem *port, void *buf, unsigned long count);
extern void ioread16_rep(const void __iomem *port, void *buf, unsigned long count);
extern void ioread32_rep(const void __iomem *port, void *buf, unsigned long count);
extern void iowrite8_rep(void __iomem *port, const void *buf, unsigned long count);
extern void iowrite16_rep(void __iomem *port, const void *buf, unsigned long count);
extern void iowrite32_rep(void __iomem *port, const void *buf, unsigned long count);
/* These two have to be extern inline because of the extern prototype from
<asm-generic/iomap.h>. It is not legal to mix "extern" and "static" for
the same declaration. */
extern inline void __iomem *ioport_map(unsigned long port, unsigned int size)
{
return IO_CONCAT(__IO_PREFIX,ioportmap) (port);
@ -629,10 +636,6 @@ extern void outsl (unsigned long port, const void *src, unsigned long count);
#define RTC_PORT(x) (0x70 + (x))
#define RTC_ALWAYS_BCD 0
/*
* These get provided from <asm-generic/iomap.h> since alpha does not
* select GENERIC_IOMAP.
*/
#define ioread64 ioread64
#define iowrite64 iowrite64
#define ioread8_rep ioread8_rep

View File

@ -18,12 +18,13 @@ config M68K
select DMA_DIRECT_REMAP if M68K_NONCOHERENT_DMA && !COLDFIRE
select GENERIC_ATOMIC64
select GENERIC_CPU_DEVICES
select GENERIC_IOMAP if HAS_IOPORT
select GENERIC_IOMAP if HAS_IOPORT && MMU && !COLDFIRE
select GENERIC_IRQ_SHOW
select GENERIC_LIB_ASHLDI3
select GENERIC_LIB_ASHRDI3
select GENERIC_LIB_LSHRDI3
select GENERIC_LIB_MULDI3
select GENERIC_PCI_IOMAP if PCI
select HAS_IOPORT if PCI || ISA || ATARI_ROM_ISA
select HAVE_ARCH_LIBGCC_H
select HAVE_ARCH_SECCOMP

View File

@ -123,10 +123,6 @@ static inline void writel(u32 value, volatile void __iomem *addr)
#define PCI_IO_SIZE 0x00010000 /* 64k */
#define PCI_IO_MASK (PCI_IO_SIZE - 1)
#define HAVE_ARCH_PIO_SIZE
#define PIO_OFFSET 0
#define PIO_MASK 0xffff
#define PIO_RESERVED 0x10000
#define PCI_IOBASE ((void __iomem *) PCI_IO_PA)
#define PCI_SPACE_LIMIT PCI_IO_MASK
#endif /* CONFIG_PCI */

View File

@ -38,7 +38,6 @@ config MIPS
select GENERIC_CMOS_UPDATE
select GENERIC_CPU_AUTOPROBE
select GENERIC_GETTIMEOFDAY
select GENERIC_IOMAP
select GENERIC_IRQ_PROBE
select GENERIC_IRQ_SHOW
select GENERIC_ISA_DMA if EISA
@ -47,6 +46,7 @@ config MIPS
select GENERIC_LIB_CMPDI2
select GENERIC_LIB_LSHRDI3
select GENERIC_LIB_UCMPDI2
select GENERIC_PCI_IOMAP
select GENERIC_SCHED_CLOCK if !CAVIUM_OCTEON_SOC
select GENERIC_SMP_IDLE_THREAD
select GENERIC_IDLE_POLL_SETUP

View File

@ -66,17 +66,6 @@ static inline void set_io_port_base(unsigned long base)
mips_io_port_base = base;
}
/*
* Provide the necessary definitions for generic iomap. We make use of
* mips_io_port_base for iomap(), but we don't reserve any low addresses for
* use with I/O ports.
*/
#define HAVE_ARCH_PIO_SIZE
#define PIO_OFFSET mips_io_port_base
#define PIO_MASK IO_SPACE_LIMIT
#define PIO_RESERVED 0x0UL
/*
* Enforce in-order execution of data I/O. In the MIPS architecture
* these are equivalent to corresponding platform-specific memory
@ -397,8 +386,8 @@ static inline void writes##bwlq(volatile void __iomem *mem, \
} \
} \
\
static inline void reads##bwlq(volatile void __iomem *mem, void *addr, \
unsigned int count) \
static inline void reads##bwlq(const volatile void __iomem *mem, \
void *addr, unsigned int count) \
{ \
volatile type *__addr = addr; \
\
@ -555,6 +544,16 @@ extern void (*_dma_cache_inv)(unsigned long start, unsigned long size);
void __ioread64_copy(void *to, const void __iomem *from, size_t count);
#if defined(CONFIG_PCI) && defined(CONFIG_PCI_DRIVERS_LEGACY)
struct pci_dev;
void pci_iounmap(struct pci_dev *dev, void __iomem *addr);
#define pci_iounmap pci_iounmap
#endif
#ifndef PCI_IOBASE
#define PCI_IOBASE ((void __iomem *)mips_io_port_base)
#endif
#include <asm-generic/io.h>
static inline void *isa_bus_to_virt(unsigned long address)

View File

@ -7,9 +7,10 @@
#endif /* CONFIG_64BIT */
/* Skip 128k to trap NULL pointer dereferences */
#define PCI_IOBASE _AC(0xc000000000000000 + SZ_128K, UL)
#define PCI_PORT_BASE _AC(0xc000000000000000 + SZ_128K, UL)
#define PCI_IOBASE (void __iomem *)PCI_PORT_BASE
#define PCI_IOSIZE SZ_16M
#define MAP_BASE (PCI_IOBASE + PCI_IOSIZE)
#define MAP_BASE (PCI_PORT_BASE + PCI_IOSIZE)
#define IO_SPACE_LIMIT (PCI_IOSIZE - 1)

View File

@ -2,7 +2,7 @@
#ifndef __ASM_MACH_RALINK_SPACES_H_
#define __ASM_MACH_RALINK_SPACES_H_
#define PCI_IOBASE mips_io_port_base
#define PCI_IOBASE (void __iomem *)mips_io_port_base
#define PCI_IOSIZE SZ_64K
#define IO_SPACE_LIMIT (PCI_IOSIZE - 1)

View File

@ -43,4 +43,14 @@ void __iomem *__pci_ioport_map(struct pci_dev *dev,
return (void __iomem *) (ctrl->io_map_base + port);
}
void pci_iounmap(struct pci_dev *dev, void __iomem *addr)
{
struct pci_controller *ctrl = dev->bus->sysdata;
void __iomem *base = (void __iomem *)ctrl->io_map_base;
if (addr < base || addr > (base + resource_size(ctrl->io_resource)))
iounmap(addr);
}
EXPORT_SYMBOL(pci_iounmap);
#endif /* CONFIG_PCI_DRIVERS_LEGACY */

View File

@ -128,7 +128,7 @@ void __init prom_init(void)
}
/* init base address of io space */
set_io_port_base(PCI_IOBASE);
set_io_port_base((unsigned long)PCI_IOBASE);
if (loongson_sysconf.early_config)
loongson_sysconf.early_config();
@ -178,7 +178,7 @@ static int __init add_legacy_isa_io(struct fwnode_handle *fwnode, resource_size_
return -EINVAL;
}
vaddr = PCI_IOBASE + range->io_start;
vaddr = (unsigned long)PCI_IOBASE + range->io_start;
vmap_page_range(vaddr, vaddr + size, hw_start, pgprot_device(PAGE_KERNEL));

View File

@ -227,36 +227,54 @@ extern void outsl (unsigned long port, const void *src, unsigned long count);
#define F_EXTEND(x) ((unsigned long)((x) | (0xffffffff00000000ULL)))
#ifdef CONFIG_64BIT
#define ioread64 ioread64
#define ioread64be ioread64be
#define iowrite64 iowrite64
#define iowrite64be iowrite64be
extern u64 ioread64(const void __iomem *addr);
extern u64 ioread64be(const void __iomem *addr);
#define ioread64 ioread64
#define ioread64be ioread64be
extern void iowrite64(u64 val, void __iomem *addr);
extern void iowrite64be(u64 val, void __iomem *addr);
#define iowrite64 iowrite64
#define iowrite64be iowrite64be
#endif
#include <asm-generic/iomap.h>
/*
* These get provided from <asm-generic/iomap.h> since parisc does not
* select GENERIC_IOMAP.
*/
extern void __iomem *ioport_map(unsigned long port, unsigned int nr);
extern void ioport_unmap(void __iomem *);
#define ioport_map ioport_map
#define ioport_unmap ioport_unmap
extern unsigned int ioread8(const void __iomem *);
extern unsigned int ioread16(const void __iomem *);
extern unsigned int ioread16be(const void __iomem *);
extern unsigned int ioread32(const void __iomem *);
extern unsigned int ioread32be(const void __iomem *);
#define ioread8 ioread8
#define ioread16 ioread16
#define ioread32 ioread32
#define ioread16be ioread16be
#define ioread32be ioread32be
extern void iowrite8(u8, void __iomem *);
extern void iowrite16(u16, void __iomem *);
extern void iowrite16be(u16, void __iomem *);
extern void iowrite32(u32, void __iomem *);
extern void iowrite32be(u32, void __iomem *);
#define iowrite8 iowrite8
#define iowrite16 iowrite16
#define iowrite32 iowrite32
#define iowrite16be iowrite16be
#define iowrite32be iowrite32be
extern void ioread8_rep(const void __iomem *port, void *buf, unsigned long count);
extern void ioread16_rep(const void __iomem *port, void *buf, unsigned long count);
extern void ioread32_rep(const void __iomem *port, void *buf, unsigned long count);
#define ioread8_rep ioread8_rep
#define ioread16_rep ioread16_rep
#define ioread32_rep ioread32_rep
extern void iowrite8_rep(void __iomem *port, const void *buf, unsigned long count);
extern void iowrite16_rep(void __iomem *port, const void *buf, unsigned long count);
extern void iowrite32_rep(void __iomem *port, const void *buf, unsigned long count);
#define iowrite8_rep iowrite8_rep
#define iowrite16_rep iowrite16_rep
#define iowrite32_rep iowrite32_rep

View File

@ -738,35 +738,11 @@ static inline unsigned int ioread32be(const void __iomem *addr)
#define ioread32be ioread32be
#ifdef __powerpc64__
static inline u64 ioread64_lo_hi(const void __iomem *addr)
{
return readq(addr);
}
#define ioread64_lo_hi ioread64_lo_hi
static inline u64 ioread64_hi_lo(const void __iomem *addr)
{
return readq(addr);
}
#define ioread64_hi_lo ioread64_hi_lo
static inline u64 ioread64be(const void __iomem *addr)
{
return readq_be(addr);
}
#define ioread64be ioread64be
static inline u64 ioread64be_lo_hi(const void __iomem *addr)
{
return readq_be(addr);
}
#define ioread64be_lo_hi ioread64be_lo_hi
static inline u64 ioread64be_hi_lo(const void __iomem *addr)
{
return readq_be(addr);
}
#define ioread64be_hi_lo ioread64be_hi_lo
#endif /* __powerpc64__ */
static inline void iowrite16be(u16 val, void __iomem *addr)
@ -782,35 +758,11 @@ static inline void iowrite32be(u32 val, void __iomem *addr)
#define iowrite32be iowrite32be
#ifdef __powerpc64__
static inline void iowrite64_lo_hi(u64 val, void __iomem *addr)
{
writeq(val, addr);
}
#define iowrite64_lo_hi iowrite64_lo_hi
static inline void iowrite64_hi_lo(u64 val, void __iomem *addr)
{
writeq(val, addr);
}
#define iowrite64_hi_lo iowrite64_hi_lo
static inline void iowrite64be(u64 val, void __iomem *addr)
{
writeq_be(val, addr);
}
#define iowrite64be iowrite64be
static inline void iowrite64be_lo_hi(u64 val, void __iomem *addr)
{
writeq_be(val, addr);
}
#define iowrite64be_lo_hi iowrite64be_lo_hi
static inline void iowrite64be_hi_lo(u64 val, void __iomem *addr)
{
writeq_be(val, addr);
}
#define iowrite64be_hi_lo iowrite64be_hi_lo
#endif /* __powerpc64__ */
struct pci_dev;

View File

@ -19,7 +19,6 @@
#include <asm/machvec.h>
#include <asm/page.h>
#include <linux/pgtable.h>
#include <asm-generic/iomap.h>
#define __IO_PREFIX generic
#include <asm/io_generic.h>
@ -100,7 +99,7 @@ pfx##writes##bwlq(volatile void __iomem *mem, const void *addr, \
} \
} \
\
static inline void pfx##reads##bwlq(volatile void __iomem *mem, \
static inline void pfx##reads##bwlq(const volatile void __iomem *mem, \
void *addr, unsigned int count) \
{ \
volatile type *__addr = addr; \
@ -114,37 +113,18 @@ static inline void pfx##reads##bwlq(volatile void __iomem *mem, \
__BUILD_MEMORY_STRING(__raw_, b, u8)
__BUILD_MEMORY_STRING(__raw_, w, u16)
void __raw_writesl(void __iomem *addr, const void *data, int longlen);
void __raw_readsl(const void __iomem *addr, void *data, int longlen);
void __raw_writesl(void volatile __iomem *addr, const void *data, int longlen);
void __raw_readsl(const volatile void __iomem *addr, void *data, int longlen);
__BUILD_MEMORY_STRING(__raw_, q, u64)
#define ioport_map ioport_map
#define ioport_unmap ioport_unmap
#define pci_iounmap pci_iounmap
#define ioread8 ioread8
#define ioread16 ioread16
#define ioread16be ioread16be
#define ioread32 ioread32
#define ioread32be ioread32be
#define iowrite8 iowrite8
#define iowrite16 iowrite16
#define iowrite16be iowrite16be
#define iowrite32 iowrite32
#define iowrite32be iowrite32be
#define ioread8_rep ioread8_rep
#define ioread16_rep ioread16_rep
#define ioread32_rep ioread32_rep
#define iowrite8_rep iowrite8_rep
#define iowrite16_rep iowrite16_rep
#define iowrite32_rep iowrite32_rep
#ifdef CONFIG_HAS_IOPORT_MAP
extern void __iomem *ioport_map(unsigned long port, unsigned int nr);
/*
* Slowdown I/O port space accesses for antique hardware.
*/

View File

@ -21,10 +21,7 @@ obj-y := head_32.o debugtraps.o dumpstack.o \
syscalls_32.o time.o topology.o traps.o \
traps_32.o unwinder.o
ifndef CONFIG_GENERIC_IOMAP
obj-y += iomap.o
obj-$(CONFIG_HAS_IOPORT_MAP) += ioport.o
endif
obj-y += sys_sh32.o
obj-y += cpu/

View File

@ -1,162 +0,0 @@
// SPDX-License-Identifier: GPL-2.0
/*
* arch/sh/kernel/iomap.c
*
* Copyright (C) 2000 Niibe Yutaka
* Copyright (C) 2005 - 2007 Paul Mundt
*/
#include <linux/module.h>
#include <linux/io.h>
unsigned int ioread8(const void __iomem *addr)
{
return readb(addr);
}
EXPORT_SYMBOL(ioread8);
unsigned int ioread16(const void __iomem *addr)
{
return readw(addr);
}
EXPORT_SYMBOL(ioread16);
unsigned int ioread16be(const void __iomem *addr)
{
return be16_to_cpu(__raw_readw(addr));
}
EXPORT_SYMBOL(ioread16be);
unsigned int ioread32(const void __iomem *addr)
{
return readl(addr);
}
EXPORT_SYMBOL(ioread32);
unsigned int ioread32be(const void __iomem *addr)
{
return be32_to_cpu(__raw_readl(addr));
}
EXPORT_SYMBOL(ioread32be);
void iowrite8(u8 val, void __iomem *addr)
{
writeb(val, addr);
}
EXPORT_SYMBOL(iowrite8);
void iowrite16(u16 val, void __iomem *addr)
{
writew(val, addr);
}
EXPORT_SYMBOL(iowrite16);
void iowrite16be(u16 val, void __iomem *addr)
{
__raw_writew(cpu_to_be16(val), addr);
}
EXPORT_SYMBOL(iowrite16be);
void iowrite32(u32 val, void __iomem *addr)
{
writel(val, addr);
}
EXPORT_SYMBOL(iowrite32);
void iowrite32be(u32 val, void __iomem *addr)
{
__raw_writel(cpu_to_be32(val), addr);
}
EXPORT_SYMBOL(iowrite32be);
/*
* These are the "repeat MMIO read/write" functions.
* Note the "__raw" accesses, since we don't want to
* convert to CPU byte order. We write in "IO byte
* order" (we also don't have IO barriers).
*/
static inline void mmio_insb(const void __iomem *addr, u8 *dst, int count)
{
while (--count >= 0) {
u8 data = __raw_readb(addr);
*dst = data;
dst++;
}
}
static inline void mmio_insw(const void __iomem *addr, u16 *dst, int count)
{
while (--count >= 0) {
u16 data = __raw_readw(addr);
*dst = data;
dst++;
}
}
static inline void mmio_insl(const void __iomem *addr, u32 *dst, int count)
{
while (--count >= 0) {
u32 data = __raw_readl(addr);
*dst = data;
dst++;
}
}
static inline void mmio_outsb(void __iomem *addr, const u8 *src, int count)
{
while (--count >= 0) {
__raw_writeb(*src, addr);
src++;
}
}
static inline void mmio_outsw(void __iomem *addr, const u16 *src, int count)
{
while (--count >= 0) {
__raw_writew(*src, addr);
src++;
}
}
static inline void mmio_outsl(void __iomem *addr, const u32 *src, int count)
{
while (--count >= 0) {
__raw_writel(*src, addr);
src++;
}
}
void ioread8_rep(const void __iomem *addr, void *dst, unsigned long count)
{
mmio_insb(addr, dst, count);
}
EXPORT_SYMBOL(ioread8_rep);
void ioread16_rep(const void __iomem *addr, void *dst, unsigned long count)
{
mmio_insw(addr, dst, count);
}
EXPORT_SYMBOL(ioread16_rep);
void ioread32_rep(const void __iomem *addr, void *dst, unsigned long count)
{
mmio_insl(addr, dst, count);
}
EXPORT_SYMBOL(ioread32_rep);
void iowrite8_rep(void __iomem *addr, const void *src, unsigned long count)
{
mmio_outsb(addr, src, count);
}
EXPORT_SYMBOL(iowrite8_rep);
void iowrite16_rep(void __iomem *addr, const void *src, unsigned long count)
{
mmio_outsw(addr, src, count);
}
EXPORT_SYMBOL(iowrite16_rep);
void iowrite32_rep(void __iomem *addr, const void *src, unsigned long count)
{
mmio_outsl(addr, src, count);
}
EXPORT_SYMBOL(iowrite32_rep);

View File

@ -23,8 +23,3 @@ void __iomem *ioport_map(unsigned long port, unsigned int nr)
return (void __iomem *)(port + sh_io_port_base);
}
EXPORT_SYMBOL(ioport_map);
void ioport_unmap(void __iomem *addr)
{
}
EXPORT_SYMBOL(ioport_unmap);

View File

@ -11,7 +11,7 @@
#include <linux/module.h>
#include <linux/io.h>
void __raw_readsl(const void __iomem *addr, void *datap, int len)
void __raw_readsl(const volatile void __iomem *addr, void *datap, int len)
{
u32 *data;
@ -60,7 +60,7 @@ void __raw_readsl(const void __iomem *addr, void *datap, int len)
}
EXPORT_SYMBOL(__raw_readsl);
void __raw_writesl(void __iomem *addr, const void *data, int len)
void __raw_writesl(volatile void __iomem *addr, const void *data, int len)
{
if (likely(len != 0)) {
int tmp1;

View File

@ -5,6 +5,8 @@
*/
#include <linux/bits.h>
#include <linux/bug.h>
#include <linux/export.h>
#include <linux/iosys-map.h>
#include <linux/types.h>

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@ -26,6 +26,19 @@ static unsigned int sh_clk_read(struct clk *clk)
return ioread32(clk->mapped_reg);
}
static unsigned int sh_clk_read_status(struct clk *clk)
{
void __iomem *mapped_status = (phys_addr_t)clk->status_reg -
(phys_addr_t)clk->enable_reg + clk->mapped_reg;
if (clk->flags & CLK_ENABLE_REG_8BIT)
return ioread8(mapped_status);
else if (clk->flags & CLK_ENABLE_REG_16BIT)
return ioread16(mapped_status);
return ioread32(mapped_status);
}
static void sh_clk_write(int value, struct clk *clk)
{
if (clk->flags & CLK_ENABLE_REG_8BIT)
@ -40,20 +53,10 @@ static int sh_clk_mstp_enable(struct clk *clk)
{
sh_clk_write(sh_clk_read(clk) & ~(1 << clk->enable_bit), clk);
if (clk->status_reg) {
unsigned int (*read)(const void __iomem *addr);
int i;
void __iomem *mapped_status = (phys_addr_t)clk->status_reg -
(phys_addr_t)clk->enable_reg + clk->mapped_reg;
if (clk->flags & CLK_ENABLE_REG_8BIT)
read = ioread8;
else if (clk->flags & CLK_ENABLE_REG_16BIT)
read = ioread16;
else
read = ioread32;
for (i = 1000;
(read(mapped_status) & (1 << clk->enable_bit)) && i;
(sh_clk_read_status(clk) & (1 << clk->enable_bit)) && i;
i--)
cpu_relax();
if (!i) {

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@ -31,42 +31,22 @@ extern unsigned int ioread16(const void __iomem *);
extern unsigned int ioread16be(const void __iomem *);
extern unsigned int ioread32(const void __iomem *);
extern unsigned int ioread32be(const void __iomem *);
#ifdef CONFIG_64BIT
extern u64 ioread64(const void __iomem *);
extern u64 ioread64be(const void __iomem *);
#endif
#ifdef readq
#define ioread64_lo_hi ioread64_lo_hi
#define ioread64_hi_lo ioread64_hi_lo
#define ioread64be_lo_hi ioread64be_lo_hi
#define ioread64be_hi_lo ioread64be_hi_lo
extern u64 ioread64_lo_hi(const void __iomem *addr);
extern u64 ioread64_hi_lo(const void __iomem *addr);
extern u64 ioread64be_lo_hi(const void __iomem *addr);
extern u64 ioread64be_hi_lo(const void __iomem *addr);
#endif
extern u64 __ioread64_lo_hi(const void __iomem *addr);
extern u64 __ioread64_hi_lo(const void __iomem *addr);
extern u64 __ioread64be_lo_hi(const void __iomem *addr);
extern u64 __ioread64be_hi_lo(const void __iomem *addr);
extern void iowrite8(u8, void __iomem *);
extern void iowrite16(u16, void __iomem *);
extern void iowrite16be(u16, void __iomem *);
extern void iowrite32(u32, void __iomem *);
extern void iowrite32be(u32, void __iomem *);
#ifdef CONFIG_64BIT
extern void iowrite64(u64, void __iomem *);
extern void iowrite64be(u64, void __iomem *);
#endif
#ifdef writeq
#define iowrite64_lo_hi iowrite64_lo_hi
#define iowrite64_hi_lo iowrite64_hi_lo
#define iowrite64be_lo_hi iowrite64be_lo_hi
#define iowrite64be_hi_lo iowrite64be_hi_lo
extern void iowrite64_lo_hi(u64 val, void __iomem *addr);
extern void iowrite64_hi_lo(u64 val, void __iomem *addr);
extern void iowrite64be_lo_hi(u64 val, void __iomem *addr);
extern void iowrite64be_hi_lo(u64 val, void __iomem *addr);
#endif
extern void __iowrite64_lo_hi(u64 val, void __iomem *addr);
extern void __iowrite64_hi_lo(u64 val, void __iomem *addr);
extern void __iowrite64be_lo_hi(u64 val, void __iomem *addr);
extern void __iowrite64be_hi_lo(u64 val, void __iomem *addr);
/*
* "string" versions of the above. Note that they

View File

@ -79,10 +79,18 @@ unsigned long __read_once_word_nocheck(const void *addr)
(typeof(x))__read_once_word_nocheck(&(x)); \
})
static __no_kasan_or_inline
static __no_sanitize_or_inline
unsigned long read_word_at_a_time(const void *addr)
{
/* open-coded instrument_read(addr, 1) */
kasan_check_read(addr, 1);
kcsan_check_read(addr, 1);
/*
* This load can race with concurrent stores to out-of-bounds memory,
* but READ_ONCE() can't be used because it requires higher alignment
* than plain loads in arm64 builds with LTO.
*/
return *(unsigned long *)addr;
}

View File

@ -101,22 +101,38 @@ static inline void iowrite64be_hi_lo(u64 val, void __iomem *addr)
#ifndef ioread64
#define ioread64_is_nonatomic
#if defined(CONFIG_GENERIC_IOMAP) && defined(CONFIG_64BIT)
#define ioread64 __ioread64_hi_lo
#else
#define ioread64 ioread64_hi_lo
#endif
#endif
#ifndef iowrite64
#define iowrite64_is_nonatomic
#if defined(CONFIG_GENERIC_IOMAP) && defined(CONFIG_64BIT)
#define iowrite64 __iowrite64_hi_lo
#else
#define iowrite64 iowrite64_hi_lo
#endif
#endif
#ifndef ioread64be
#define ioread64be_is_nonatomic
#if defined(CONFIG_GENERIC_IOMAP) && defined(CONFIG_64BIT)
#define ioread64be __ioread64be_hi_lo
#else
#define ioread64be ioread64be_hi_lo
#endif
#endif
#ifndef iowrite64be
#define iowrite64be_is_nonatomic
#if defined(CONFIG_GENERIC_IOMAP) && defined(CONFIG_64BIT)
#define iowrite64be __iowrite64be_hi_lo
#else
#define iowrite64be iowrite64be_hi_lo
#endif
#endif
#endif /* _LINUX_IO_64_NONATOMIC_HI_LO_H_ */

View File

@ -101,22 +101,38 @@ static inline void iowrite64be_lo_hi(u64 val, void __iomem *addr)
#ifndef ioread64
#define ioread64_is_nonatomic
#if defined(CONFIG_GENERIC_IOMAP) && defined(CONFIG_64BIT)
#define ioread64 __ioread64_lo_hi
#else
#define ioread64 ioread64_lo_hi
#endif
#endif
#ifndef iowrite64
#define iowrite64_is_nonatomic
#if defined(CONFIG_GENERIC_IOMAP) && defined(CONFIG_64BIT)
#define iowrite64 __iowrite64_lo_hi
#else
#define iowrite64 iowrite64_lo_hi
#endif
#endif
#ifndef ioread64be
#define ioread64be_is_nonatomic
#if defined(CONFIG_GENERIC_IOMAP) && defined(CONFIG_64BIT)
#define ioread64be __ioread64be_lo_hi
#else
#define ioread64be ioread64be_lo_hi
#endif
#endif
#ifndef iowrite64be
#define iowrite64be_is_nonatomic
#if defined(CONFIG_GENERIC_IOMAP) && defined(CONFIG_64BIT)
#define iowrite64be __iowrite64be_lo_hi
#else
#define iowrite64be iowrite64be_lo_hi
#endif
#endif
#endif /* _LINUX_IO_64_NONATOMIC_LO_HI_H_ */

View File

@ -9,13 +9,10 @@
#include <linux/sizes.h>
#include <linux/types.h>
#include <linux/init.h>
#include <linux/bug.h>
#include <linux/err.h>
#include <asm/io.h>
#include <asm/page.h>
struct device;
struct resource;
#ifndef __iowrite32_copy
void __iowrite32_copy(void __iomem *to, const void *from, size_t count);

View File

@ -111,7 +111,7 @@ EXPORT_SYMBOL(ioread16be);
EXPORT_SYMBOL(ioread32);
EXPORT_SYMBOL(ioread32be);
#ifdef readq
#ifdef CONFIG_64BIT
static u64 pio_read64_lo_hi(unsigned long port)
{
u64 lo, hi;
@ -153,21 +153,21 @@ static u64 pio_read64be_hi_lo(unsigned long port)
}
__no_kmsan_checks
u64 ioread64_lo_hi(const void __iomem *addr)
u64 __ioread64_lo_hi(const void __iomem *addr)
{
IO_COND(addr, return pio_read64_lo_hi(port), return readq(addr));
return 0xffffffffffffffffULL;
}
__no_kmsan_checks
u64 ioread64_hi_lo(const void __iomem *addr)
u64 __ioread64_hi_lo(const void __iomem *addr)
{
IO_COND(addr, return pio_read64_hi_lo(port), return readq(addr));
return 0xffffffffffffffffULL;
}
__no_kmsan_checks
u64 ioread64be_lo_hi(const void __iomem *addr)
u64 __ioread64be_lo_hi(const void __iomem *addr)
{
IO_COND(addr, return pio_read64be_lo_hi(port),
return mmio_read64be(addr));
@ -175,19 +175,19 @@ u64 ioread64be_lo_hi(const void __iomem *addr)
}
__no_kmsan_checks
u64 ioread64be_hi_lo(const void __iomem *addr)
u64 __ioread64be_hi_lo(const void __iomem *addr)
{
IO_COND(addr, return pio_read64be_hi_lo(port),
return mmio_read64be(addr));
return 0xffffffffffffffffULL;
}
EXPORT_SYMBOL(ioread64_lo_hi);
EXPORT_SYMBOL(ioread64_hi_lo);
EXPORT_SYMBOL(ioread64be_lo_hi);
EXPORT_SYMBOL(ioread64be_hi_lo);
EXPORT_SYMBOL(__ioread64_lo_hi);
EXPORT_SYMBOL(__ioread64_hi_lo);
EXPORT_SYMBOL(__ioread64be_lo_hi);
EXPORT_SYMBOL(__ioread64be_hi_lo);
#endif /* readq */
#endif /* CONFIG_64BIT */
#ifndef pio_write16be
#define pio_write16be(val,port) outw(swab16(val),port)
@ -236,7 +236,7 @@ EXPORT_SYMBOL(iowrite16be);
EXPORT_SYMBOL(iowrite32);
EXPORT_SYMBOL(iowrite32be);
#ifdef writeq
#ifdef CONFIG_64BIT
static void pio_write64_lo_hi(u64 val, unsigned long port)
{
outl(val, port);
@ -261,7 +261,7 @@ static void pio_write64be_hi_lo(u64 val, unsigned long port)
pio_write32be(val, port + sizeof(u32));
}
void iowrite64_lo_hi(u64 val, void __iomem *addr)
void __iowrite64_lo_hi(u64 val, void __iomem *addr)
{
/* Make sure uninitialized memory isn't copied to devices. */
kmsan_check_memory(&val, sizeof(val));
@ -269,7 +269,7 @@ void iowrite64_lo_hi(u64 val, void __iomem *addr)
writeq(val, addr));
}
void iowrite64_hi_lo(u64 val, void __iomem *addr)
void __iowrite64_hi_lo(u64 val, void __iomem *addr)
{
/* Make sure uninitialized memory isn't copied to devices. */
kmsan_check_memory(&val, sizeof(val));
@ -277,7 +277,7 @@ void iowrite64_hi_lo(u64 val, void __iomem *addr)
writeq(val, addr));
}
void iowrite64be_lo_hi(u64 val, void __iomem *addr)
void __iowrite64be_lo_hi(u64 val, void __iomem *addr)
{
/* Make sure uninitialized memory isn't copied to devices. */
kmsan_check_memory(&val, sizeof(val));
@ -285,7 +285,7 @@ void iowrite64be_lo_hi(u64 val, void __iomem *addr)
mmio_write64be(val, addr));
}
void iowrite64be_hi_lo(u64 val, void __iomem *addr)
void __iowrite64be_hi_lo(u64 val, void __iomem *addr)
{
/* Make sure uninitialized memory isn't copied to devices. */
kmsan_check_memory(&val, sizeof(val));
@ -293,12 +293,12 @@ void iowrite64be_hi_lo(u64 val, void __iomem *addr)
mmio_write64be(val, addr));
}
EXPORT_SYMBOL(iowrite64_lo_hi);
EXPORT_SYMBOL(iowrite64_hi_lo);
EXPORT_SYMBOL(iowrite64be_lo_hi);
EXPORT_SYMBOL(iowrite64be_hi_lo);
EXPORT_SYMBOL(__iowrite64_lo_hi);
EXPORT_SYMBOL(__iowrite64_hi_lo);
EXPORT_SYMBOL(__iowrite64be_lo_hi);
EXPORT_SYMBOL(__iowrite64be_hi_lo);
#endif /* readq */
#endif /* CONFIG_64BIT */
/*
* These are the "repeat MMIO read/write" functions.